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commit d27cd92431fe34e3b69b902a0a2689eed65c8aa8 Author: Daniel P. Carvalho <[email protected]> AuthorDate: Fri Oct 9 12:07:46 2026 -0300 arch/mips/pic32mz: fix the Ethernet TX done assertion. pic32mz_txdone() asserted that the next TX descriptor is available before freeing the buffers of the transmitted descriptors. But pic32mz_txdesc() only reports a descriptor as available once its buffer was freed, so the assertion failed as soon as the TX ring wrapped around. Check it after the buffers are freed. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Daniel P. Carvalho <[email protected]> --- arch/mips/src/pic32mz/pic32mz_ethernet.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/mips/src/pic32mz/pic32mz_ethernet.c b/arch/mips/src/pic32mz/pic32mz_ethernet.c index be97170ec8f..b8ecbb7ed5c 100644 --- a/arch/mips/src/pic32mz/pic32mz_ethernet.c +++ b/arch/mips/src/pic32mz/pic32mz_ethernet.c @@ -1744,12 +1744,6 @@ static void pic32mz_txdone(struct pic32mz_driver_s *priv) priv->pd_inten &= ~ETH_TXINTS; pic32mz_putreg(priv->pd_inten, PIC32MZ_ETH_IEN); - /* Verify that the hardware is ready to send another packet. Since a Tx - * just completed, this must be the case. - */ - - DEBUGASSERT(pic32mz_txdesc(priv) != NULL); - /* Inspect the list of TX descriptors to see if the EOWN bit is cleared. * If it is, this descriptor is now under software control and the message * was transmitted. Use TSV to check for the transmission result. @@ -1801,6 +1795,12 @@ static void pic32mz_txdone(struct pic32mz_driver_s *priv) } } + /* Verify that the hardware is ready to send another packet. Since a Tx + * just completed and its buffer was freed, this must be the case. + */ + + DEBUGASSERT(pic32mz_txdesc(priv) != NULL); + /* Check if there is a pending Tx transfer that was deferred by Rx handling * because there were no available Tx descriptors. If so, process that * pending Tx now.
