This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
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The following commit(s) were added to refs/heads/master by this push:
new ea28748d7a7 boards/arm/stm32h7: Extend support for stm32h7s8-dk board
ea28748d7a7 is described below
commit ea28748d7a7eaf2d9b0494ac882576e12c70a6ca
Author: Peter Barada <[email protected]>
AuthorDate: Sun Oct 11 22:54:53 2026 -0400
boards/arm/stm32h7: Extend support for stm32h7s8-dk board
Add support for MX66UW1G45G external flash, and both boot-xip and
nsh-xip configurations needed to run nsh out of external memory.
Signed-off-by Peter Barada <[email protected]>
---
boards/arm/stm32h7/stm32h7s8-dk/Kconfig | 26 +++
.../stm32h7s8-dk/configs/boot-xip/defconfig | 42 +++++
.../stm32h7/stm32h7s8-dk/configs/nsh-xip/defconfig | 59 ++++++
boards/arm/stm32h7/stm32h7s8-dk/include/board.h | 14 ++
boards/arm/stm32h7/stm32h7s8-dk/scripts/Make.defs | 6 +-
boards/arm/stm32h7/stm32h7s8-dk/scripts/xip.ld | 124 +++++++++++++
boards/arm/stm32h7/stm32h7s8-dk/src/CMakeLists.txt | 10 +-
boards/arm/stm32h7/stm32h7s8-dk/src/Make.defs | 4 +
boards/arm/stm32h7/stm32h7s8-dk/src/stm32_boot.c | 10 +
.../stm32h7/stm32h7s8-dk/src/stm32_mx66uw1g45g.c | 109 +++++++++++
.../arm/stm32h7/stm32h7s8-dk/src/stm32_xip_boot.c | 201 +++++++++++++++++++++
boards/arm/stm32h7/stm32h7s8-dk/src/stm32h7s8-dk.h | 13 ++
12 files changed, 616 insertions(+), 2 deletions(-)
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/Kconfig
b/boards/arm/stm32h7/stm32h7s8-dk/Kconfig
index c524896df43..6df6b08c733 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/Kconfig
+++ b/boards/arm/stm32h7/stm32h7s8-dk/Kconfig
@@ -11,5 +11,31 @@ config STM32H7S8_DK_USE_HSE
help
Use the 24 MHz external clock supplied to the HSE input.
+config STM32H7S8_DK_XIP
+ bool "Run from external XSPI2 flash"
+ default n
+ select STM32_BYPASS_CLOCKCONFIG
+ help
+ Link NuttX for execution from the board's MX66UW1G45G flash at
+ 0x70000000. The internal flash must contain a loader which
+ initializes XSPI2 before transferring control to NuttX.
+
+config STM32H7S8_DK_XIP_BOOTLOADER
+ bool "Boot an external XIP image"
+ default n
+ depends on STM32_XSPI && MTD_MX66UW1G45G
+ help
+ Build a NuttX bootloader in internal flash. It initializes the
+ MX66UW1G45G flash in memory-mapped mode and starts a raw Arm
image
+ linked at 0x70000000. Image selection, update and integrity
checking
+ are not provided.
+
+config STM32H7S8_DK_XIP_BOOTLOADER_BANNER
+ default n
+ bool "Display identifying banner during bootloader startup"
+ depends on STM32H7S8_DK_XIP_BOOTLOADER
+ help
+ If enabled display UTS name information during bootloader
+ startup including release, version, machine and board name.
endif # ARCH_BOARD_STM32H7S8_DK
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/configs/boot-xip/defconfig
b/boards/arm/stm32h7/stm32h7s8-dk/configs/boot-xip/defconfig
new file mode 100644
index 00000000000..6212231b02f
--- /dev/null
+++ b/boards/arm/stm32h7/stm32h7s8-dk/configs/boot-xip/defconfig
@@ -0,0 +1,42 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that
includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="stm32h7s8-dk"
+CONFIG_ARCH_BOARD_STM32H7S8_DK=y
+CONFIG_ARCH_CHIP="stm32h7"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32H7=y
+CONFIG_ARCH_CHIP_STM32H7S3L8=y
+CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_BOARD_LOOPSPERMSEC=119965
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_INIT_ENTRYPOINT="stm32_xip_boot"
+CONFIG_MTD=y
+CONFIG_MTD_MX66UW1G45G=y
+CONFIG_NUNGET_CHARS=0
+CONFIG_RAM_SIZE=466944
+CONFIG_RAM_START=0x24000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_START_DAY=22
+CONFIG_START_MONTH=9
+CONFIG_START_YEAR=2026
+CONFIG_STM32H7S8_DK_XIP_BOOTLOADER=y
+CONFIG_STM32H7S8_DK_XIP_BOOTLOADER_BANNER=y
+CONFIG_STM32_PWR_DIRECT_SMPS_SUPPLY=y
+CONFIG_STM32_UART4=y
+CONFIG_STM32_XSPI=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_UART4_SERIAL_CONSOLE=y
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/configs/nsh-xip/defconfig
b/boards/arm/stm32h7/stm32h7s8-dk/configs/nsh-xip/defconfig
new file mode 100644
index 00000000000..fd1b28d4622
--- /dev/null
+++ b/boards/arm/stm32h7/stm32h7s8-dk/configs/nsh-xip/defconfig
@@ -0,0 +1,59 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that
includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="stm32h7s8-dk"
+CONFIG_ARCH_BOARD_STM32H7S8_DK=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32h7"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32H7=y
+CONFIG_ARCH_CHIP_STM32H7S3L8=y
+CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
+CONFIG_ARCH_IRQBUTTONS=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_BOARD_LOOPSPERMSEC=119965
+CONFIG_BUILTIN=y
+CONFIG_EXAMPLES_BUTTONS=y
+CONFIG_EXAMPLES_LEDS=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_FS_TMPFS=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=1536
+CONFIG_INPUT=y
+CONFIG_INPUT_BUTTONS=y
+CONFIG_INPUT_BUTTONS_LOWER=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_NCHAINS=24
+CONFIG_MM_IOB=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_MAXARGUMENTS=16
+CONFIG_NSH_READLINE=y
+CONFIG_PIPES=y
+CONFIG_RAM_SIZE=466944
+CONFIG_RAM_START=0x24000000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=22
+CONFIG_START_MONTH=9
+CONFIG_START_YEAR=2026
+CONFIG_STM32H7S8_DK_XIP=y
+CONFIG_STM32_UART4=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART4_SERIAL_CONSOLE=y
+CONFIG_USERLED=y
+CONFIG_USERLED_LOWER=y
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/include/board.h
b/boards/arm/stm32h7/stm32h7s8-dk/include/board.h
index 7b1e471e253..7c8125f0f68 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/include/board.h
+++ b/boards/arm/stm32h7/stm32h7s8-dk/include/board.h
@@ -212,4 +212,18 @@
#define GPIO_UART4_TX (GPIO_UART4_TX_5 | GPIO_SPEED_100MHz) /* PD1 */
#define GPIO_UART4_RX (GPIO_UART4_RX_5 | GPIO_SPEED_100MHz) /* PD0 */
+/* XSPI2: MX661G45G Octal SPI flash. */
+
+#define GPIO_XSPI2_CLK (GPIO_XSPI2_CLK_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_DQS (GPIO_XSPI2_DQS_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_NCS (GPIO_XSPI2_NCS_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO0 (GPIO_XSPI2_IO0_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO1 (GPIO_XSPI2_IO1_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO2 (GPIO_XSPI2_IO2_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO3 (GPIO_XSPI2_IO3_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO4 (GPIO_XSPI2_IO4_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO5 (GPIO_XSPI2_IO5_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO6 (GPIO_XSPI2_IO6_1 | GPIO_SPEED_100MHz)
+#define GPIO_XSPI2_IO7 (GPIO_XSPI2_IO7_1 | GPIO_SPEED_100MHz)
+
#endif /* __BOARDS_ARM_STM32H7_STM32H7S8_DK_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/scripts/Make.defs
b/boards/arm/stm32h7/stm32h7s8-dk/scripts/Make.defs
index 5e3c95152de..a7796ece3ae 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/scripts/Make.defs
+++ b/boards/arm/stm32h7/stm32h7s8-dk/scripts/Make.defs
@@ -24,7 +24,11 @@ include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
-ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)flash.ld
+ifeq ($(CONFIG_STM32H7S8_DK_XIP),y)
+ ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)xip.ld
+else
+ ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)flash.ld
+endif
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES)
$(ARCHDEFINES) $(EXTRAFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS)
$(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/scripts/xip.ld
b/boards/arm/stm32h7/stm32h7s8-dk/scripts/xip.ld
new file mode 100644
index 00000000000..135c3dc9fd3
--- /dev/null
+++ b/boards/arm/stm32h7/stm32h7s8-dk/scripts/xip.ld
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * boards/arm/stm32h7/stm32h7s8-dk/scripts/xip.ld
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The XIP image executes from the board's 32-Mbyte MX25UW25645G flash at
+ * 0x70000000. The STM32H7S3L8 default SRAM allocation provides:
+ *
+ * 64 Kbytes of ITCM RAM at 0x00000000
+ * 64 Kbytes of DTCM RAM at 0x20000000
+ * 456 Kbytes of AXI SRAM at 0x24000000
+ * 16 Kbytes of AHB SRAM1 at 0x30000000
+ * 16 Kbytes of AHB SRAM2 at 0x30004000
+ * 4 Kbytes of backup SRAM at 0x38800000
+ */
+
+MEMORY
+{
+ itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
+ flash (rx) : ORIGIN = 0x70000000, LENGTH = 32M
+ dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+ sram (rwx) : ORIGIN = 0x24000000, LENGTH = 456K
+ sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 16K
+ sram2 (rwx) : ORIGIN = 0x30004000, LENGTH = 16K
+ bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+
+SECTIONS
+{
+ .text :
+ {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ _etext = ABSOLUTE(.);
+ } > flash
+
+ .init_section :
+ {
+ _sinit = ABSOLUTE(.);
+ KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)
SORT_BY_INIT_PRIORITY(.ctors.*)))
+ KEEP(*(.init_array EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o
*crtend?.o) .ctors))
+ _einit = ABSOLUTE(.);
+ } > flash
+
+ .ARM.extab :
+ {
+ *(.ARM.extab*)
+ } > flash
+
+ __exidx_start = ABSOLUTE(.);
+ .ARM.exidx :
+ {
+ *(.ARM.exidx*)
+ } > flash
+ __exidx_end = ABSOLUTE(.);
+
+ _eronly = ABSOLUTE(.);
+
+ .data :
+ {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > sram AT > flash
+
+ .bss :
+ {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(8);
+ _ebss = ABSOLUTE(.);
+ } > sram
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/src/CMakeLists.txt
b/boards/arm/stm32h7/stm32h7s8-dk/src/CMakeLists.txt
index 688496d2c08..c0b00f6a535 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/src/CMakeLists.txt
+++ b/boards/arm/stm32h7/stm32h7s8-dk/src/CMakeLists.txt
@@ -32,9 +32,17 @@ if(CONFIG_ARCH_BUTTONS)
list(APPEND SRCS stm32_buttons.c)
endif()
+if(CONFIG_STM32H7S8_DK_XIP_BOOTLOADER)
+ list(APPEND SRCS stm32_mx66uw1g45g.c stm32_xip_boot.c)
+endif()
+
target_sources(board PRIVATE ${SRCS})
-set(LD_SCRIPT flash.ld)
+if(CONFIG_STM32H7S8_DK_XIP)
+ set(LD_SCRIPT xip.ld)
+else()
+ set(LD_SCRIPT flash.ld)
+endif()
set_property(GLOBAL PROPERTY LD_SCRIPT
"${NUTTX_BOARD_DIR}/scripts/${LD_SCRIPT}")
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/src/Make.defs
b/boards/arm/stm32h7/stm32h7s8-dk/src/Make.defs
index e83412a3d0e..144c3e701be 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/src/Make.defs
+++ b/boards/arm/stm32h7/stm32h7s8-dk/src/Make.defs
@@ -34,6 +34,10 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
+ifeq ($(CONFIG_STM32H7S8_DK_XIP_BOOTLOADER),y)
+CSRCS += stm32_mx66uw1g45g.c stm32_xip_boot.c
+endif
+
DEPPATH += --dep-path board
VPATH += :board
CFLAGS +=
${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_boot.c
b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_boot.c
index 1ab256da22a..932e9fbe5a2 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_boot.c
+++ b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_boot.c
@@ -51,10 +51,20 @@
void stm32_boardinitialize(void)
{
+ uint32_t regval;
+
/* Enable VDD33USB and VDDXSPI1 domains to power LED GPIO pins. */
modifyreg32(STM32_PWR_CSR2, 0, PWR_CSR2_EN_XSPIM1 | PWR_CSR2_USB33DEN);
+ /* Wait for VDD33USB to be ready */
+
+ regval = getreg32(STM32_PWR_CSR2);
+ while (!(regval & PWR_CSR2_USB33RDY))
+ {
+ regval = getreg32(STM32_PWR_CSR2);
+ }
+
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_mx66uw1g45g.c
b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_mx66uw1g45g.c
new file mode 100644
index 00000000000..82d6dbc9ba0
--- /dev/null
+++ b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_mx66uw1g45g.c
@@ -0,0 +1,109 @@
+/****************************************************************************
+ * boards/arm/stm32h7/stm32h7s8-dk/src/stm32_mx66uw1g45g.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+
+#include <nuttx/mtd/mtd.h>
+
+#include "stm32_xspi.h"
+#include "stm32h7s8-dk.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Must match OCTA_READ/DC settings in drivers/mtd/mx66uw1g45g.c */
+
+#define MX66UW_OCTA_READ 0xec13 /* Octal STR read command */
+#define MX66UW_READ_DUMMY 6 /* Dummy cycles for 100 MHz XSPI */
+
+/* DEVSIZE encodes 2^(n+1) bytes: 26 -> 128 MB */
+
+#define MX66UW_DEVSIZE 26
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_xspi_flash_initialize
+ *
+ * Description:
+ * Initialize XSPI2 and the board's MX66UW1G45G flash, then enter
+ * memory-mapped octal STR mode.
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int stm32_xspi_flash_initialize(void)
+{
+ struct stm32_xspi_config_s config;
+ struct qspi_meminfo_s readinfo;
+ struct mtd_dev_s *mtd;
+ struct qspi_dev_s *qspi;
+
+ config.memtype = STM32_XSPI_MEMTYPE_MACRONIX;
+ config.iomport = STM32_XSPI_IOM_PORT2;
+ config.cs_override = STM32_XSPI_CS_NCS1;
+ config.devsize = MX66UW_DEVSIZE;
+ config.csht = 2;
+ config.prescaler = 3;
+ config.fthres = 4;
+ config.wrapsize = 0;
+ config.maxtran = 0;
+ config.csbound = 0;
+ config.req2ack = 1;
+ config.refresh = 0;
+ config.clock_mode3 = false;
+ config.free_running = false;
+ config.sample_shift = false;
+
+ readinfo.flags = QSPIMEM_IOCTAL | QSPIMEM_OCTALIO;
+ readinfo.addrlen = 4;
+ readinfo.dummies = MX66UW_READ_DUMMY;
+ readinfo.cmd = MX66UW_OCTA_READ;
+ readinfo.buflen = 0;
+ readinfo.addr = 0;
+ readinfo.buffer = NULL;
+
+ qspi = stm32_xspi_initialize(2, &config);
+ if (qspi == NULL)
+ {
+ return -ENODEV;
+ }
+
+ mtd = mx66uw1g45g_initialize(qspi);
+ if (mtd == NULL)
+ {
+ return -ENODEV;
+ }
+
+ return stm32_xspi_enter_memorymapped(qspi, &readinfo, NULL);
+}
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_xip_boot.c
b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_xip_boot.c
new file mode 100644
index 00000000000..3620bc46020
--- /dev/null
+++ b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32_xip_boot.c
@@ -0,0 +1,201 @@
+/****************************************************************************
+ * boards/arm/stm32h7/stm32h7s8-dk/src/stm32_xip_boot.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <stdint.h>
+#include <syslog.h>
+#include <sys/utsname.h>
+
+#include <arch/barriers.h>
+#include <nuttx/cache.h>
+
+#include "arm_internal.h"
+#include "nvic.h"
+#include "stm32h7s8-dk.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_BOARD_CUSTOM
+# ifndef CONFIG_ARCH_BOARD_CUSTOM_NAME
+# define BOARD_NAME g_unknown
+# else
+# define BOARD_NAME CONFIG_ARCH_BOARD_CUSTOM_NAME
+# endif
+#else
+# ifndef CONFIG_ARCH_BOARD
+# define BOARD_NAME g_unknown
+# else
+# define BOARD_NAME CONFIG_ARCH_BOARD
+# endif
+#endif
+
+#define STM32_XIP_BASE 0x70000000
+#define STM32_XIP_SIZE 0x02000000
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct xip_vector_s
+{
+ uint32_t stack;
+ uint32_t reset;
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: xip_vector_valid
+ *
+ * Description:
+ * Validate the initial stack pointer and reset vector of the external
+ * image before transferring control to it.
+ *
+ ****************************************************************************/
+
+static int xip_vector_valid(const struct xip_vector_s *vector)
+{
+ uint32_t reset = vector->reset & ~1;
+
+ if (vector->stack < 0x20000000 || vector->stack >= 0x40000000 ||
+ reset < STM32_XIP_BASE || reset >= STM32_XIP_BASE + STM32_XIP_SIZE ||
+ (vector->reset & 1) == 0)
+ {
+ return -EINVAL;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: xip_jump
+ *
+ * Description:
+ * Disable active core state and transfer control to an external image.
+ * This function does not return.
+ *
+ ****************************************************************************/
+
+static void xip_jump(const struct xip_vector_s *vector)
+{
+ int i;
+
+ putreg32(0, NVIC_SYSTICK_CTRL);
+ UP_ISB();
+ cpsid();
+
+ for (i = 0; i < NR_IRQS; i += 32)
+ {
+ putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
+ putreg32(0xffffffff, NVIC_IRQ_CLRPEND(i));
+ }
+
+#ifdef CONFIG_ARMV7M_DCACHE
+ up_disable_dcache();
+#endif
+#ifdef CONFIG_ARMV7M_ICACHE
+ up_disable_icache();
+#endif
+
+ putreg32(STM32_XIP_BASE, NVIC_VECTAB);
+ UP_DSB();
+ UP_ISB();
+
+ __asm__ __volatile__("msr msp, %0\n"
+ "msr control, %1\n"
+ "msr primask, %1\n"
+ "isb\n"
+ "bx %2\n"
+ :
+ : "r" (vector->stack), "r" (0),
+ "r" (vector->reset));
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_xip_boot
+ *
+ * Description:
+ * Bootloader entry point (CONFIG_INIT_ENTRYPOINT) which initializes the
+ * external flash and starts the raw NuttX image at the beginning of the
+ * XSPI2 memory-mapped window.
+ *
+ * Returned Value:
+ * This function does not return after a successful transfer. A negated
+ * errno value is returned if initialization or image validation fails.
+ *
+ ****************************************************************************/
+
+int stm32_xip_boot(int argc, char *argv[])
+{
+ const struct xip_vector_s *vector =
+ (const struct xip_vector_s *)STM32_XIP_BASE;
+ int ret;
+
+ UNUSED(argc);
+ UNUSED(argv);
+
+#ifdef CONFIG_STM32H7S8_DK_XIP_BOOTLOADER_BANNER
+ /* Display banner showing boot-xip build info */
+
+ struct utsname info;
+
+ ret = uname(&info);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: uname() failed: %d\n", ret);
+ }
+ else
+ {
+ syslog(LOG_ERR, "Bootloader %s %s %s %s\n", info.release,
+ info.version, info.machine, BOARD_NAME);
+ }
+#endif
+
+ ret = stm32_xspi_flash_initialize();
+ if (ret == OK)
+ {
+ ret = xip_vector_valid(vector);
+ }
+
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: XIP boot failed: %d\n", ret);
+ return ret;
+ }
+
+ xip_jump(vector);
+ return -EIO;
+}
diff --git a/boards/arm/stm32h7/stm32h7s8-dk/src/stm32h7s8-dk.h
b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32h7s8-dk.h
index 8292a625d03..a0fcaa023f2 100644
--- a/boards/arm/stm32h7/stm32h7s8-dk/src/stm32h7s8-dk.h
+++ b/boards/arm/stm32h7/stm32h7s8-dk/src/stm32h7s8-dk.h
@@ -89,4 +89,17 @@
int stm32_bringup(void);
+/****************************************************************************
+ * Name: stm32_xspi_flash_initialize
+ *
+ * Description:
+ * Initialize the external MX66UW1G45G flash for memory-mapped access.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32H7S8_DK_XIP_BOOTLOADER
+int stm32_xspi_flash_initialize(void);
+int stm32_xip_boot(int argc, char *argv[]);
+#endif
+
#endif /* __BOARDS_ARM_STM32H7_STM32H7S8_DK_SRC_STM32H7S8_DK_H */
