Sarthak-Pandey opened a new pull request, #20647: URL: https://github.com/apache/nuttx/pull/20647
## Summary According to the STM32H7 Reference Manual (RM0433, Section 23.5.1 / Page 897), Bit 2 of the Quad-SPI Control Register (`QUADSPI_CR`) is **Reserved** (unlike STM32F7 / STM32L4 where it serves as `DMAEN`). On STM32H7, QuadSPI triggers DMA/MDMA requests automatically when the FIFO reaches the configured threshold (`FTHRES`), without requiring an explicit DMA enable bit in `QUADSPI_CR`. Furthermore, `QSPI_CR_DMAEN` is not defined in `arch/arm/src/stm32h7/hardware/stm32_qspi.h`, causing compilation errors whenever `CONFIG_STM32_QSPI_DMA` is enabled. This PR removes all references to `QSPI_CR_DMAEN` from `arch/arm/src/stm32h7/stm32_qspi.c` and cleans up unused `regval` variables. ## Impact - Fixes compilation failure when `CONFIG_STM32_QSPI_DMA` is enabled on STM32H7. - Prevents software from writing to reserved bits in hardware registers. ## Related Issue Fixes: #16366 ## Testing - Verified register layout against STM32H7 reference manual RM0433. - Checked code formatting against NuttX style standards. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
