casaroli opened a new pull request, #20639:
URL: https://github.com/apache/nuttx/pull/20639

   ## Summary
   
   `arm64_jump_to_user()` built the SPSR of a new user task from `SPSR_EL1`, 
with only the mode bits cleared. `SPSR_EL1` holds the state of the last 
exception taken on that CPU. If the new task was switched out in a critical 
section before it reached user mode (for example, it waited for a lock), it 
resumes from an SVC taken with IRQs masked, and `SPSR_EL1` has the I bit set.
   
   The task then runs in EL0 with IRQs masked, for its whole life. Its system 
calls keep that state, and so do the children it creates with `fork()`. While 
it runs, its CPU takes no interrupt: a device interrupt routed to that CPU 
stays pending, and the timer cannot preempt the task.
   
   This PR sets a fixed SPSR: EL0t, with FIQ masked unless 
`CONFIG_ARM64_DECODEFIQ`, as `up_initial_state()` does for kernel threads.
   
   ## Impact
   
   arm64 protected and kernel builds. User tasks always start with IRQs enabled.
   
   ## Testing
   
   `qemu-armv8a:knsh` with 4 CPUs, with this change on a larger local branch, 
under a load that starts many processes in parallel:
   
   - Before: the system stopped. With gdb, 5 tasks had a saved user SPSR of 
`0x600000c0` (IRQs masked in EL0): 3 had started that way, 2 had inherited it 
from them by `fork()`. The virtio interrupt routed to the CPU of one of them 
stayed pending and enabled, and the threads waiting for it never woke up.
   - After: a debug check at the start of every system call found no caller in 
EL0 with IRQs masked, in a run of several hours.
   
   A simple test on the current master (100 processes started one after the 
other, on 1 and on 4 CPUs) does not trigger it: the new task must be switched 
out in a critical section before it reaches user mode.
   
   `ostest` on `qemu-armv8a:knsh` exits with status 0. Build: 
`qemu-armv8a:knsh`, `qemu-armv8a:knsh` with `CONFIG_ARM64_DECODEFIQ=y`, 
`imx93-evk:knsh` and `fvp-armv8r:pnsh`, no new warnings.
   


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