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The following commit(s) were added to refs/heads/master by this push:
new 99c474a70b5 arch/arm64: Start a user task with a fixed SPSR.
99c474a70b5 is described below
commit 99c474a70b5c77fed723f2f37eab847a8402fd34
Author: Marco Casaroli <[email protected]>
AuthorDate: Tue Oct 13 16:30:50 2026 +0200
arch/arm64: Start a user task with a fixed SPSR.
arm64_jump_to_user() built the SPSR of the new task from SPSR_EL1, with
the mode bits cleared. SPSR_EL1 holds the state of the last exception
on that CPU, for example an SVC of a context switch from a critical
section, with IRQs masked. The new task then ran in EL0 with IRQs
masked. Its system calls kept that state, and so did the children it
created with fork(). The CPU took no interrupt while the task ran: a
device interrupt routed to that CPU stayed pending, and the threads
that waited for it never woke up.
Set EL0t, with FIQ masked unless CONFIG_ARM64_DECODEFIQ, as
up_initial_state() does for the kernel threads.
Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Marco Casaroli <[email protected]>
---
arch/arm64/src/common/arm64_vectors.S | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/src/common/arm64_vectors.S
b/arch/arm64/src/common/arm64_vectors.S
index 2dae675644e..a1e0f5f4682 100644
--- a/arch/arm64/src/common/arm64_vectors.S
+++ b/arch/arm64/src/common/arm64_vectors.S
@@ -117,9 +117,16 @@ SECTION_FUNC(text, arm64_jump_to_user)
str x2, [sp, #8 * REG_X1]
str x3, [sp, #8 * REG_X2]
str x4, [sp, #8 * REG_SP_EL0]
- mrs x0, spsr_el1
- and x0, x0, #~SPSR_MODE_MASK
- #orr x0, x0, #SPSR_MODE_EL0T # EL0T=0x00, out of range for orr
+
+ /* EL0 with IRQs enabled. Do not copy SPSR_EL1: it holds the state of
+ * the last exception on this CPU, which can have IRQs masked.
+ */
+
+#ifdef CONFIG_ARM64_DECODEFIQ
+ mov x0, #SPSR_MODE_EL0T
+#else
+ mov x0, #(SPSR_MODE_EL0T | (1 << SPSR_DAIF_SHIFT)) /* FIQ masked */
+#endif
str x0, [sp, #8 * REG_SPSR]
#ifdef CONFIG_ARM64_MTE
