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commit 63289c4911e25802a4d8a070a32045151a08ed87 Author: leocafonso <[email protected]> AuthorDate: Tue Oct 13 21:41:35 2026 -0700 boards/arm/ra8m1/ek-ra8m1: Register IIC0/IIC1 and SCI_B-I2C channels Registers every I2C channel this board's build enables as /dev/i2cN for apps/system/i2c (i2ctool): the dedicated IIC0/IIC1 peripheral and any SCI_B channel in Simple IIC mode, each through its own independent init call with no shared dispatcher or fixed bus-number table -- ra8m1_bringup() assigns bus numbers itself with a simple counter that only advances for channels actually enabled, in source order, so numbering stays compact for whatever a given build has. Adds board.h GPIO definitions for IIC1's Grove2-connector pins and for SCI0/SCI2/SCI9's Simple IIC mode SCL/SDA, reusing each channel's existing UART pins since the two modes are mutually exclusive per channel. Tested on hardware: IIC1 (Grove2) and SCI2 registered together, landing at /dev/i2c0 and /dev/i2c1 respectively. Co-Authored-By: Claude Sonnet 5 <[email protected]> Assisted-by: Claude:claude-sonnet-5 Signed-off-by: leocafonso <[email protected]> --- boards/arm/ra8m1/ek-ra8m1/include/board.h | 33 +++++++++ boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c | 103 ++++++++++++++++++++++++++ 2 files changed, 136 insertions(+) diff --git a/boards/arm/ra8m1/ek-ra8m1/include/board.h b/boards/arm/ra8m1/ek-ra8m1/include/board.h index c2e1d16dcf3..b186ff33c51 100644 --- a/boards/arm/ra8m1/ek-ra8m1/include/board.h +++ b/boards/arm/ra8m1/ek-ra8m1/include/board.h @@ -321,9 +321,42 @@ #define GPIO_SCI9_RX GPIO_RXD9_MISO9_SCL9_3 /* PA15 */ #define GPIO_SCI9_TX GPIO_TXD9_MOSI9_SDA9_3 /* PA14 */ +/* SCI9's Simple IIC mode (CONFIG_RA_SCI9_I2C) would give up the on-board + * debugger's console on this board -- unlikely to ever be selected here, + * but defined for the same reason as SCI0's below: the driver references + * GPIO_SCIn_SCL/SDA generically for every channel it supports. + */ + +#define GPIO_SCI9_SCL GPIO_RXD9_MISO9_SCL9_3 /* PA15 */ +#define GPIO_SCI9_SDA GPIO_TXD9_MOSI9_SDA9_3 /* PA14 */ + #define GPIO_SCI0_RX GPIO_RXD0_MISO0_SCL0_3 /* P610 */ #define GPIO_SCI0_TX GPIO_TXD0_MOSI0_SDA0_3 /* P609 */ +/* SCI0's Simple IIC mode (CONFIG_RA_SCI0_I2C) is mutually exclusive with + * its UART mode above, on the same physical pins -- RXD0/TXD0 reused as + * SCL0/SDA0, per their own alternate-function names. + */ + +#define GPIO_SCI0_SCL GPIO_RXD0_MISO0_SCL0_3 /* P610 */ +#define GPIO_SCI0_SDA GPIO_TXD0_MOSI0_SDA0_3 /* P609 */ + +/* SCI2's UART mode has no pins wired on this board yet; its Simple IIC + * mode (CONFIG_RA_SCI2_I2C) uses pin group 3 directly -- PA02/PA03, + * chosen for hardware testing to avoid tying up P609/P610 (SCI0, already + * in use for the serial-test defconfig's blaster/rx wiring). + */ + +#define GPIO_SCI2_SCL GPIO_RXD2_MISO2_SCL2_3 /* PA02 */ +#define GPIO_SCI2_SDA GPIO_TXD2_MOSI2_SDA2_3 /* PA03 */ + +/* The Grove2 connector carries IIC1's SDA/SCL: SDA1 on P511, SCL1 on P512 + * (pin group 1 of IIC1, the only one wired out on this board). + */ + +#define GPIO_IIC1_SDA GPIO_SDA1_1 /* P511 */ +#define GPIO_IIC1_SCL GPIO_SCL1_1 /* P512 */ + /* Arduino shield header pin selections *************************************/ /* D2-D5 are wired as inputs, D6-D13 as outputs (see diff --git a/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c index 882c35b2ef8..c345f1f8669 100644 --- a/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c +++ b/boards/arm/ra8m1/ek-ra8m1/src/ra8m1_bringup.c @@ -33,6 +33,10 @@ #include <nuttx/fs/fs.h> #include <nuttx/leds/userled.h> +#ifdef CONFIG_I2C +# include <nuttx/i2c/i2c_master.h> +#endif + #include <arch/board/board.h> #include "ek_ra8m1.h" @@ -41,6 +45,16 @@ # include "ra_gpt.h" #endif +#if defined(CONFIG_RA_IIC0) || defined(CONFIG_RA_IIC1) +# include "ra_iic_i2c.h" +#endif + +#if defined(CONFIG_RA_SCI0_I2C) || defined(CONFIG_RA_SCI1_I2C) || \ + defined(CONFIG_RA_SCI2_I2C) || defined(CONFIG_RA_SCI3_I2C) || \ + defined(CONFIG_RA_SCI4_I2C) || defined(CONFIG_RA_SCI9_I2C) +# include "ra_sci_i2c.h" +#endif + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -51,6 +65,46 @@ # define HAVE_LEDS 1 #endif +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ra8m1_i2c_register + * + * Description: + * Register an already-initialized i2c_master_s interface (from either + * the dedicated IIC peripheral or an SCI_B channel in Simple IIC mode) + * as /dev/i2c<devno>, e.g. for apps/system/i2c (i2ctool) to use. devno + * is this board's own choice, independent of the backend's internal + * channel number -- see ra8m1_bringup()'s own comment. + * + ****************************************************************************/ + +#if defined(CONFIG_RA_IIC0) || defined(CONFIG_RA_IIC1) || \ + defined(CONFIG_RA_SCI0_I2C) || defined(CONFIG_RA_SCI1_I2C) || \ + defined(CONFIG_RA_SCI2_I2C) || defined(CONFIG_RA_SCI3_I2C) || \ + defined(CONFIG_RA_SCI4_I2C) || defined(CONFIG_RA_SCI9_I2C) +static void ra8m1_i2c_register(FAR struct i2c_master_s *i2c, int devno) +{ + if (i2c == NULL) + { + syslog(LOG_ERR, "ERROR: Failed to get I2C%d interface\n", devno); + return; + } + +#ifdef CONFIG_SYSTEM_I2CTOOL + int ret = i2c_register(i2c, devno); + + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register I2C%d driver: %d\n", + devno, ret); + } +#endif +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -107,5 +161,54 @@ int ra8m1_bringup(void) } #endif +#if defined(CONFIG_RA_IIC0) || defined(CONFIG_RA_IIC1) || \ + defined(CONFIG_RA_SCI0_I2C) || defined(CONFIG_RA_SCI1_I2C) || \ + defined(CONFIG_RA_SCI2_I2C) || defined(CONFIG_RA_SCI3_I2C) || \ + defined(CONFIG_RA_SCI4_I2C) || defined(CONFIG_RA_SCI9_I2C) + /* /dev/i2cN numbers are this board's own choice, assigned here to + * whichever channels this build actually enables -- not a fixed, + * chip-wide table reserving a slot for every possible channel whether + * built or not (see the NuttX convention surveyed across nrf52/cxd56xx: + * a second I2C-capable peripheral type always gets its own independent + * init call, with the board deciding its /dev/i2cN number directly). + * A build with only CONFIG_RA_SCI2_I2C set, for example, gets + * /dev/i2c0 for it, not /dev/i2c4. + */ + + int i2cbus = 0; +#endif + +#ifdef CONFIG_RA_IIC0 + ra8m1_i2c_register(ra_iic_i2cbus_initialize(0), i2cbus++); +#endif + +#ifdef CONFIG_RA_IIC1 + ra8m1_i2c_register(ra_iic_i2cbus_initialize(1), i2cbus++); +#endif + +#ifdef CONFIG_RA_SCI0_I2C + ra8m1_i2c_register(ra_sci_i2cbus_initialize(0), i2cbus++); +#endif + +#ifdef CONFIG_RA_SCI1_I2C + ra8m1_i2c_register(ra_sci_i2cbus_initialize(1), i2cbus++); +#endif + +#ifdef CONFIG_RA_SCI2_I2C + ra8m1_i2c_register(ra_sci_i2cbus_initialize(2), i2cbus++); +#endif + +#ifdef CONFIG_RA_SCI3_I2C + ra8m1_i2c_register(ra_sci_i2cbus_initialize(3), i2cbus++); +#endif + +#ifdef CONFIG_RA_SCI4_I2C + ra8m1_i2c_register(ra_sci_i2cbus_initialize(4), i2cbus++); +#endif + +#ifdef CONFIG_RA_SCI9_I2C + ra8m1_i2c_register(ra_sci_i2cbus_initialize(9), i2cbus++); +#endif + return ret; }
