raiden00pl opened a new pull request, #20872:
URL: https://github.com/apache/nuttx/pull/20872
## Summary
Unify tickles and systick drivers for stm32.
## Impact
I’ve marked two changes as "breaking changes" to make them more visible to
the user, though they aren’t strictly breaking changes:
- !arch/arm/src/common/stm32: unify SysTick timer driver
BREAKING CHANGE: the STM32F7 SysTick default changes from HCLK/8 to the
CPU clock, as on all other families. The tick rate does not change, but
the longest possible tick is 8 times shorter. STM32F7 configurations
that need the old clock select CONFIG_STM32_SYSTICK_HCLK_DIV8.
- !arch/arm/src/common/stm32: use the common tickless driver on STM32L4, L5
and U5
BREAKING CHANGE: this is a change of the STM32L4 tickless implementation,
not of its interface; it is marked as breaking only to make it visible.
Configurations with the default timers need no change and keep using
TIM2. CONFIG_STM32_TICKLESS_ONESHOT and CONFIG_STM32_TICKLESS_FREERUN are
removed; a configuration that set them selects the timer with
CONFIG_STM32_TICKLESS_TIMER and CONFIG_STM32_TICKLESS_CHANNEL instead
(basic timers TIM6/TIM7 cannot be used).
## Testing
Tested on hardware: SysTick registers and 50 s clock accuracy compared
against master, plus sleep latency.
| Board | Core | SysTick (CPU clock) | SysTick (HCLK/8) | Tickless |
|---|---|---|---|---|
| NUCLEO-F091RC | Cortex-M0 | ✓ | — ¹ | ✓ ³ |
| NUCLEO-C071RB | Cortex-M0+ | ✓ | — ¹ | ✓ |
| NUCLEO-C092RC | Cortex-M0+ | ✓ | — ¹ | ✓ |
| NUCLEO-G071RB | Cortex-M0+ | ✓ | — ¹ | ✓ |
| NUCLEO-L073RZ | Cortex-M0+ | ✓ | — ¹ | ✓ |
| NUCLEO-U083RC | Cortex-M0+ | ✓ | — ¹ | ✓ |
| NUCLEO-F207ZG | Cortex-M3 | ✓ | ✓ | ✓ |
| NUCLEO-L152RE | Cortex-M3 | ✓ | ✓ | ✓ |
| NUCLEO-F303ZE | Cortex-M4 | ✓ | ✓ | ✓ |
| NUCLEO-F439ZI | Cortex-M4 | ✓ | ✓ | ✓ |
| NUCLEO-L496ZG | Cortex-M4 | ✓ | ✓ | ✓ |
| NUCLEO-F767ZI | Cortex-M7 | ✓ | ✓ | ✓ |
| NUCLEO-H743ZI | Cortex-M7 | ✓ | — ² | ✓ |
| NUCLEO-H533RE | Cortex-M33 | ✓ | ✓ | ✓ |
| NUCLEO-C562RE | Cortex-M33 | ✓ | ✓ | ✓ |
| NUCLEO-L552ZE | Cortex-M33 | ✓ | ✓ | ✓ |
| NUCLEO-U3C5ZI-Q | Cortex-M33 | ✓ | ✓ | ✓ |
| NUCLEO-U5A5ZJ-Q | Cortex-M33 | ✓ | ✓ | ✓ |
¹ ARMv6-M keeps its own SysTick clock choice (core clock or core clock /
16).
² Not offered on STM32H7: on silicon rev Y the SysTick external clock is
not
divided by 8 (ES0392 erratum 2.2.3), confirmed on this board.
³ Requires the ARMv6-M `g_running_tasks` fix.
Also tested:
- SysTick lower half (`CONFIG_TIMER_ARCH`) and
`CONFIG_SCHED_TICKLESS_ALARM`
on NUCLEO-H743ZI and NUCLEO-F439ZI.
- Tickless CPU load, debug freeze, and long sleeps on a 16-bit timer on
NUCLEO-F439ZI.
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