casaroli opened a new pull request, #21013:
URL: https://github.com/apache/nuttx/pull/21013
## Summary
Since #20412 (commit ab9dcf33649), `mmu_ln_setentry()` panics in a kernel
build when a global kernel mapping lies inside the 1 GiB user window
`ARCH_ADDRENV_VBASE` to `ARCH_ADDRENV_VEND`. In `arty_a7:knsh` and
`arty_a7:knsh-tickless` this window is 0x10000000-0x4fffffff
(`CONFIG_ARCH_TEXT_VBASE=0x10000000`). It holds the kernel text, data and page
pool at 0x40000000-0x40bfffff, so both configurations panic at boot in
`litex_kernel_mappings()`.
The I/O mapping (`CONFIG_LITEX_MMU_IO_BASE=0x80000000`, size 0x7f000000)
also covers every other 1 GiB window above the kernel. This PR maps only the
CSR range 0xf0000000-0xfeffffff, which holds all the registers that these
configurations use (UART, timer, CLINT, PLIC), and moves the user window to
0x80000000-0xbfffffff. The board `gnu-elf.ld` links the programs at the new
text and data addresses.
## Impact
`arty_a7:knsh` and `arty_a7:knsh-tickless` only. The Ethernet buffers at
0x80000000 (`LITEX_ETHMAC_RXBASE`/`TXBASE`) are no longer mapped in these two
configurations; neither of them enables `CONFIG_LITEX_ETHMAC`. Flat
configurations do not use these options. CI does not build `arty_a7`
(`tools/ci/testlist/risc-v-04.dat`), so it did not see the panic.
## Testing
Renode 1.16.1, one VexRiscv hart, with the UART (0xf0001000), timer, CLINT
and PLIC at the addresses of
`arch/risc-v/src/litex/hardware/litex_memorymap.h`. OpenSBI and the device tree
are the prebuilt LiteX VexRiscv images from the Renode demos, loaded at the
addresses of `boot.json` in the VexRiscv SMP documentation. Kernel, `make
export`, apps import and ROMFS as in that documentation.
Master 3196e0e090c, `arty_a7:knsh`:
```
OpenSBI v0.6-2-ge16425a
Platform Name : Litex/VexRiscv SMP
...
dump_assert_info: Current Version: NuttX 13.0.1-RC0 3196e0e090c Oct 26 2026
18:16:22 risc-v
dump_assert_info: Assertion failed panic: at file: :0 task: process: Kernel 0
```
The Renode function trace shows `litex_kernel_mappings()` ->
`mmu_ln_setentry()` for the first kernel text page at 0x40000000 -> `_assert()`.
This PR, `arty_a7:knsh`:
```
NuttShell (NSH) NuttX-13.0.1-RC0
nsh> hello
Hello, World!!
nsh>
```
The programs link in the new window (`readelf -l hello`):
```
master: LOAD 0x001000 0x10000000 0x10000000 0x01018 0x01018 R E 0x1000
LOAD 0x003000 0x10401000 0x10401000 0x00004 0x00008 RW 0x1000
this PR: LOAD 0x001000 0x80000000 0x80000000 0x01018 0x01018 R E 0x1000
LOAD 0x003000 0x80401000 0x80401000 0x00004 0x00008 RW 0x1000
```
`arty_a7:knsh-tickless` does not build on master, for a reason that this PR
does not change: `riscv_mtimer.c` needs `CONFIG_ONESHOT_COUNT`, which
`ARCH_CHIP_LITEX` does not select. With `select ONESHOT_COUNT if ONESHOT` added
locally (not in this PR), it panics the same way on master and boots to `nsh>`
and runs `hello` with this PR.
Not tested on a real Arty A7 board.
`tools/checkpatch.sh -c -u -m -g` passes.
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