Swatantra-66 opened a new pull request, #21336: URL: https://github.com/apache/nuttx/pull/21336
## Summary In `arch/arm/src/stm32wl5/stm32wl5_serial.c`, `stm32wl5serial_setformat()` writes the baud rate register (`BRR`), `CR2` STOP bits, and the parity/word length bits (`PCE`, `PS`, `M0`, `M1`) in `CR1` while the USART is enabled (`UE = 1`). Per ST Reference Manual RM0453 (STM32WL5x) Section 31.8 / 32.8, these bits are write-protected and can only be written when the USART is disabled (`UE = 0`). Consequently, run-time `tcsetattr()` calls attempting to change baud rate, parity, or word length return success while leaving the hardware USART registers unchanged. Clears `USART_CR1_UE` before the update and restores it upon completion inside a critical section, aligning the STM32WL5 driver with the approved implementations in STM32L4 (commit 47180bf5ea), STM32WB (PR #21334), STM32H7, and F7. Also fixes pre-existing `nxstyle` alignment, declaration, and brace issues in `stm32wl5serial_ioctl`, `stm32wl5serial_setapbclock`, `stm32wl5serial_detach`, `stm32wl5serial_pm_suspend`, `stm32wl5serial_pm_prepare`, and `stm32_serial_dma_poll`. ## Impact - **Architecture**: ARM Cortex-M4 / Cortex-M0+ (STM32WL5x / STM32WLEx series). - **Driver**: `arch/arm/src/stm32wl5/stm32wl5_serial.c`. - **User Impact**: Fixes silent failure when changing serial line format or baud rate at runtime via `tcsetattr()`. 100% `nxstyle` compliant across the file. ## Testing - Verified `nxstyle` compliance with NuttX's official `nxstyle` tool across all 3,008 lines (0 errors, 0 warnings). - Clean Unix LF line endings and strict line width <= 78 columns. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
