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commit c97bbac77b3e6b8c858248d4e1082af9bfb18a85 Author: zhangyuan29 <[email protected]> AuthorDate: Fri Sep 19 13:39:22 2025 +0800 arch/tricore: get right tos for tc3xx for tc3xx cpu0~cpu5 tos is 0,2~6, is not right to use tos0 + cpuidx to get the tos number. Signed-off-by: zhangyuan29 <[email protected]> --- arch/tricore/src/common/tricore_irq.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/arch/tricore/src/common/tricore_irq.c b/arch/tricore/src/common/tricore_irq.c index b0213a31c79..6371acc0190 100644 --- a/arch/tricore/src/common/tricore_irq.c +++ b/arch/tricore/src/common/tricore_irq.c @@ -74,6 +74,19 @@ static inline void tricore_color_intstack(void) * Private Data ****************************************************************************/ +static const IfxSrc_Tos g_tricore_tos[] = +{ + IfxSrc_Tos_cpu0, + IfxSrc_Tos_cpu1, + IfxSrc_Tos_cpu2, + IfxSrc_Tos_cpu3, + IfxSrc_Tos_cpu4, + IfxSrc_Tos_cpu5, +#ifdef CONFIG_ARCH_CHIP_TC4XX + IfxSrc_Tos_csrm, +#endif +}; + static spinlock_t g_irqlock = SP_UNLOCKED; static int g_irqmap_count = 1; @@ -104,10 +117,10 @@ static void tricore_gpsrinitialize(void) for (i = 0; i < 6; i++) { #ifdef CONFIG_ARCH_CHIP_TC3XX - IfxSrc_init(src, (cpu_idx == 0 ? IfxSrc_Tos_cpu0 : cpu_idx + 1), + IfxSrc_init(src, g_tricore_tos[cpu_idx], IRQ_TO_NDX(TRICORE_SRC2IRQ(src))); #else - IfxSrc_init(src, IfxSrc_Tos_cpu0 + cpu_idx, + IfxSrc_init(src, g_tricore_tos[cpu_idx], IRQ_TO_NDX(TRICORE_SRC2IRQ(src)), IfxSrc_VmId_none); #endif @@ -119,7 +132,7 @@ static void tricore_gpsrinitialize(void) #ifndef CONFIG_ARCH_CHIP_TC3XX src = &SRC_GPSR6_SR0 + cpu_idx; - IfxSrc_init(src, IfxSrc_Tos_cpu0 + cpu_idx, + IfxSrc_init(src, g_tricore_tos[cpu_idx], IRQ_TO_NDX(TRICORE_SRC2IRQ(src)), IfxSrc_VmId_none); #endif @@ -193,9 +206,9 @@ void up_enable_irq(int irq) volatile Ifx_SRC_SRCR *src = &SRC_CPU_CPU0_SB + irq; #ifdef CONFIG_ARCH_CHIP_TC3XX - IfxSrc_init(src, IfxSrc_Tos_cpu0 + up_cpu_index(), IRQ_TO_NDX(irq)); + IfxSrc_init(src, g_tricore_tos[up_cpu_index()], IRQ_TO_NDX(irq)); #else - IfxSrc_init(src, IfxSrc_Tos_cpu0 + up_cpu_index(), IRQ_TO_NDX(irq), + IfxSrc_init(src, g_tricore_tos[up_cpu_index()], IRQ_TO_NDX(irq), IfxSrc_VmId_none); #endif @@ -222,9 +235,10 @@ void up_affinity_irq(int irq, cpu_set_t cpuset) */ #ifdef CONFIG_ARCH_CHIP_TC3XX - IfxSrc_init(src, ffs(cpuset) - 1, irq_prio); + IfxSrc_init(src, g_tricore_tos[ffs(cpuset) - 1], irq_prio); #else - IfxSrc_init(src, ffs(cpuset) - 1, irq_prio, IfxSrc_VmId_none); + IfxSrc_init(src, g_tricore_tos[ffs(cpuset) - 1], irq_prio, + IfxSrc_VmId_none); #endif IfxSrc_enable(src);
