casaroli opened a new pull request, #21431: URL: https://github.com/apache/nuttx/pull/21431
## Summary Two arm64 chips do not start the PMU cycle counter correctly: - zynq-mpsoc: zynq_boot.c calls up_perf_init() with CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, but no zynq-mpsoc header defines it. A build with ARCH_PERF_EVENTS (the default with SCHED_CRITMONITOR) fails. The first commit gives up_perf_init() the real clock of the Cortex-A53 cores: mpsoc_clk_rate_get(acpu) reads it from the PLL registers, as zynq_serial.c does for the UART clock. - imx9: arm64_chip_boot() never calls up_perf_init(), so the counter does not run and its rate stays ULONG_MAX. With ARCH_PERF_EVENTS every perf time is then 0. The second commit calls up_perf_init() at the end of arm64_chip_boot(), as the other arm64 chips do, with the clock of the A55 cores: the ARM PLL or the A55 clock root, as the shared CCM GPR selects. With IMX9_CLK_OVER_SCMI (i.MX95) the clocks belong to the system manager, which is not ready at that point, so that case does not change. ## Impact Only zynq-mpsoc and i.MX93 with ARCH_PERF_EVENTS: zynq-mpsoc builds, and the perf times of both come from a running counter with the right rate. No API change, no documentation change. ## Testing Builds with -Werror, SCHED_CRITMONITOR and ARCH_PERF_EVENTS: | config | master | this PR | |---|---|---| | zcu111:nsh (zynq-mpsoc) | fails: CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC undeclared | OK | | imx93-evk:nsh | OK (counter not started) | OK | | imx93-evk:knsh (kernel) | not built | OK | | imx95-a55-evk:nsh (IMX9_CLK_OVER_SCMI) | not built | OK (no change) | Build only: no zynq-mpsoc or i.MX9 board and no QEMU model for them here. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
