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The following commit(s) were added to refs/heads/master by this push:
new 7cc92502c31 arm/stm32h7: Fix the PCLK1 prescaler mask.
7cc92502c31 is described below
commit 7cc92502c3166305c9f436f2c46d4e8a211eaeb5
Author: Justin <[email protected]>
AuthorDate: Fri Nov 6 14:10:18 2026 +0900
arm/stm32h7: Fix the PCLK1 prescaler mask.
Clear D2PPRE1 instead of D2PPRE2 before setting the APB1 prescaler in
stm32_stdclockconfig(), in both STM32H7 RCC implementations.
The current code ORs the requested prescaler with the inherited D2PPRE1
bits. For example, an inherited HCLK/4 encoding (5) and a requested
HCLK/2 encoding (4) leave APB1 at HCLK/4. The preceding rcc_reset()
does not clear D2CFGR, so a bootloader can leave this state behind.
Use the mask for the field being written. The following PCLK2 setup
continues to program D2PPRE2 independently. No API or configuration
changes are needed.
Based on upstream master 749ea3bb719886989ba0ca5b68deac54cf018439.
Build-tested with arm-none-eabi-gcc 13.2.1 for nucleo-h743zi:nsh and
stm32h747i-disco:nsh. Host register-model checks reproduce the old
behavior and pass with the fix. Hardware validation remains pending.
Related: https://github.com/PX4/NuttX/pull/444
Assisted-by: Codex:GPT-6
---
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c | 2 +-
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
index 9e3c4afaa64..cadc579fbda 100644
--- a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
+++ b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
@@ -814,7 +814,7 @@ void stm32_stdclockconfig(void)
/* Set PCLK1 */
regval = getreg32(STM32_RCC_D2CFGR);
- regval &= ~RCC_D2CFGR_D2PPRE2_MASK;
+ regval &= ~RCC_D2CFGR_D2PPRE1_MASK;
regval |= STM32_RCC_D2CFGR_D2PPRE1;
putreg32(regval, STM32_RCC_D2CFGR);
diff --git a/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
b/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
index 526dc538e4a..311f1bfecbb 100644
--- a/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
+++ b/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
@@ -741,7 +741,7 @@ void stm32_stdclockconfig(void)
/* Set PCLK1 */
regval = getreg32(STM32_RCC_D2CFGR);
- regval &= ~RCC_D2CFGR_D2PPRE2_MASK;
+ regval &= ~RCC_D2CFGR_D2PPRE1_MASK;
regval |= STM32_RCC_D2CFGR_D2PPRE1;
putreg32(regval, STM32_RCC_D2CFGR);
