ssekar15 opened a new pull request, #21545:
URL: https://github.com/apache/nuttx/pull/21545
## Summary
The TC3xx and TC4xx serial drivers (tc3xx_serial.c, tc4xx_serial.c) are
the same code apart from the chip, and set up the ASCLIN and the UART pins
through the Infineon iLLD IfxAsclin and IfxPort drivers, with the pins
named by the iLLD pin map.
This series replaces both with one native driver in a new src/aurix
directory, for the AURIX peripheral drivers common to TC3xx and TC4xx
(src/common stays for the TriCore architecture code):
- arch/tricore: Add the ASCLIN and port register definitions.
The ASCLIN0 base and register offsets, which differ between the chips,
go to src/tc3xx/hardware/tc3xx_asclin.h and
src/tc4xx/hardware/tc4xx_asclin.h; the register bits, which are the same,
to src/aurix/tricore_asclin.h. The port registers and pin modes of the
UART pins go to hardware/tc3xx_port.h and hardware/tc4xx_port.h.
- arch/tricore: Add the fast ASCLIN clock frequency.
tricore_clock_asclinf returns fASCLINF in Hz from the peripheral PLL and
the ASCLINF divider, as IfxScuCcu_getAsclinFFrequency and
IfxClock_getAsclinFFrequency compute it.
- arch/tricore: Drive the UART without the iLLD.
src/aurix/tricore_serial.c programs the ASCLIN registers directly: 8N1,
16 times oversampling with three samples at sample point 8, FIFO
interrupts at one byte. The fractional baud rate divider is the last
continued fraction convergent of (baud * 16) / fPD that fits the 12-bit
BRG fields, in place of the IfxAsclin search. The P14.1 RX and P14.0 TX
pins are set up with the port registers: IOCR and PDR on TC3xx (PDR and
the ASCLIN CLC under the CPU ENDINIT), PADCFG DRVCFG on TC4xx.
- arch/tricore: Stop building the iLLD IfxAsclin driver.
- arch/tricore: Stop building the iLLD IfxPort driver.
## Dependency
Depends on https://github.com/apache/nuttx/pull/21519.
## Impact
TriCore only (arch/tricore).
- New src/aurix directory (Make.defs, CMakeLists.txt, tricore_serial.c,
tricore_asclin.h), added to the make and cmake include paths.
- tc3xx_serial.c and tc4xx_serial.c are removed. src/tc3xx/chip.h and
src/tc4xx/chip.h name the UART0 port and pins (UART_PIN_PORT,
UART_PIN_RX, UART_PIN_TX) instead of the iLLD pin map entries.
- IfxAsclin.c, IfxAsclin_cfg.c, the ASCLIN pin map, IfxPort.c and
IfxPort_cfg_TC39xB.c / IfxPort_cfg_TC4Dx.c are no longer built.
- The UART Kconfig options (CONFIG_TC3XX_UART0, CONFIG_TC4XX_UART0) are
unchanged.
- No functional change intended: the ASCLIN and pin registers after boot
are the same as before, including BRG.
No board defconfig or documentation changes.
## Testing
I confirm that changes are verified on local setup and works as intended:
* Build Host(s): Linux x86_64, Debian GNU/Linux 12 (bookworm)
* Toolchains: AURIX GCC 11.3.1 (tricore-elf-gcc), TASKING VX-toolset v6.4r1
(TC3x), TASKING SmartCode v10.4r1 (TC4x)
* Build systems: make, cmake (Ninja)
* Target(s): a2g-tc397-5v-tft:nsh, triboard_tc4x9_com:nsh
* Hardware: TriBoard TC397 V2.0; TriBoard TC4x7 COM V3.0 for the
triboard_tc4x9_com image
* Each commit passes tools/checkpatch.sh.
Build results (tip):
| Board | GCC make | GCC cmake | TASKING make | TASKING cmake |
|---|---|---|---|---|
| a2g-tc397-5v-tft:nsh | pass | pass | pass | - |
| triboard_tc4x9_com:nsh | pass | - | pass | pass |
Runtime, ostest (on 7b451025326, the same code as the tip before a
cmake-format indentation fix in arch/tricore/src/CMakeLists.txt):
| Board | GCC | TASKING |
|---|---|---|
| TriBoard TC397 (a2g-tc397-5v-tft:nsh) | pass | pass |
| TriBoard TC4x7 (triboard_tc4x9_com:nsh) | pass (see note) | wqueue assert,
also on master |
```
nsh> uname -a
NuttX 10.4.0 7b451025326 Nov 6 2026 22:01:28 tricore triboard_tc4x9_com
nsh> ostest
...
user_main: Exiting
ostest_main: Exiting with status 0
```
BRG 2/217 at fPD 200 MHz gives 115207 baud (+0.006%).
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