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commit cf6e09bb3e0e4e94d7e0996daf06b5db84785d14 Author: raiden00pl <[email protected]> AuthorDate: Mon Nov 9 12:42:17 2026 +0100 arch/arm/stm32h7: Fix /dev/random failing with EIO. The RNG is clocked from HSI48 (RNGSEL reset value), but HSI48 was started only with CONFIG_STM32_HSI48. With CONFIG_STM32_RNG alone the RNG had no clock and every read() failed with EIO. Start HSI48 also when CONFIG_STM32_RNG is set. Tested on NUCLEO-H743ZI and NUCLEO-H7S3L8. Assisted-by: Claude:claude-fable-5-1 Signed-off-by: raiden00pl <[email protected]> --- arch/arm/src/stm32h7/stm32h7rsxx_rcc.c | 4 ++-- arch/arm/src/stm32h7/stm32h7x3xx_rcc.c | 4 ++-- arch/arm/src/stm32h7/stm32h7x7xx_rcc.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/src/stm32h7/stm32h7rsxx_rcc.c b/arch/arm/src/stm32h7/stm32h7rsxx_rcc.c index f572361b27c..60dc1d64f62 100644 --- a/arch/arm/src/stm32h7/stm32h7rsxx_rcc.c +++ b/arch/arm/src/stm32h7/stm32h7rsxx_rcc.c @@ -532,8 +532,8 @@ void stm32_stdclockconfig(void) return; } -#ifdef CONFIG_STM32_HSI48 - /* Enable HSI48 */ +#if defined(CONFIG_STM32_HSI48) || defined(CONFIG_STM32_RNG) + /* Enable HSI48, also the RNG kernel clock (reset value) */ modifyreg32(STM32_RCC_CR, 0, RCC_CR_HSI48ON); while ((getreg32(STM32_RCC_CR) & RCC_CR_HSI48RDY) == 0) diff --git a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c index cadc579fbda..a4c7fbd1683 100644 --- a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c +++ b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c @@ -769,8 +769,8 @@ void stm32_stdclockconfig(void) } #endif -#ifdef CONFIG_STM32_HSI48 - /* Enable HSI48 */ +#if defined(CONFIG_STM32_HSI48) || defined(CONFIG_STM32_RNG) + /* Enable HSI48, also the RNG kernel clock (RNGSEL reset value) */ regval = getreg32(STM32_RCC_CR); regval |= RCC_CR_HSI48ON; diff --git a/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c b/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c index 311f1bfecbb..55952749c81 100644 --- a/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c +++ b/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c @@ -696,8 +696,8 @@ void stm32_stdclockconfig(void) } #endif -#ifdef CONFIG_STM32_HSI48 - /* Enable HSI48 */ +#if defined(CONFIG_STM32_HSI48) || defined(CONFIG_STM32_RNG) + /* Enable HSI48, also the RNG kernel clock (RNGSEL reset value) */ regval = getreg32(STM32_RCC_CR); regval |= RCC_CR_HSI48ON;
