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commit 148d97e3601d8f2e727486c1624b71b34004bede Author: Marco Casaroli <[email protected]> AuthorDate: Wed Nov 11 11:43:34 2026 +0100 arch/arm/rp23xx: Make an atomic operation outside the SRAM fail with SMP. The Cortex-M33 sends an exclusive access (LDREX/STREX) to the global exclusive monitor of RP2350 only for Shareable memory, unless ACTLR.EXTEXCLALL is set. The global monitor supports exclusive accesses only in the SRAM (datasheet, section 2.1.6). rp23xx_mpu_share_sram() maps the SRAM Shareable, so an atomic operation there excludes the other core. In the PSRAM, which keeps the default Non-shareable map, the local monitor of the core accepts it, so an atomic operation there does not exclude the other core and loses updates without an error. With SMP, set ACTLR.EXTEXCLALL on each core in rp23xx_mpu_share_sram(). An atomic operation outside the SRAM then fails each time and never ends, so the error shows at once instead of as lost updates. The SRAM does not change: a two-core atomic counter there stays exact. Without SMP nothing changes: with one core an atomic operation in the PSRAM is correct. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Marco Casaroli <[email protected]> --- arch/arm/src/rp23xx/rp23xx_mpu.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/src/rp23xx/rp23xx_mpu.h b/arch/arm/src/rp23xx/rp23xx_mpu.h index 1533be38ccf..3a39d786166 100644 --- a/arch/arm/src/rp23xx/rp23xx_mpu.h +++ b/arch/arm/src/rp23xx/rp23xx_mpu.h @@ -33,6 +33,8 @@ #include "arm_internal.h" #include "mpu.h" +#include "nvic.h" +#include "hardware/rp23xx_m33.h" #include "hardware/rp23xx_memorymap.h" /**************************************************************************** @@ -67,6 +69,11 @@ * armv8-m/arm_mpu.c, and the SRAM takes MPU region 0, so that region * must stay reserved should arm_mpu.c ever allocate regions here. * + * Also send every exclusive access to the global monitor + * (ACTLR.EXTEXCLALL). Outside the SRAM, in the PSRAM for example, the + * global monitor fails every exclusive access, so an atomic operation + * there never ends instead of not excluding the other core. + * * A resume from suspend to RAM does not run this; the suspend support * does not handle SMP yet, but must call it once it does. * @@ -97,6 +104,12 @@ static inline void rp23xx_mpu_share_sram(void) putreg32(MPU_CTRL_ENABLE | MPU_CTRL_PRIVDEFENA, MPU_CTRL); UP_MB(); + + /* Fail an exclusive access outside the SRAM */ + + putreg32(getreg32(NVIC_ACTLR) | RP23XX_M33_ACTLR_EXTEXCLALL_BITS, + NVIC_ACTLR); + UP_MB(); } #endif /* __ARCH_ARM_SRC_RP23XX_RP23XX_MPU_H */
