This is an automated email from the ASF dual-hosted git repository.

jerpelea pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git

commit d50c41dbd93baced3faa774cfbbfab6de61ef5f7
Author: p-szafonimateusz <[email protected]>
AuthorDate: Wed Jun 10 15:13:27 2026 +0200

    drivers/can/ctucanfd_pci.c: fix unaligned MMIO writes to TX data registers.
    
    The TX data loops wrote each payload byte to a 32-bit register at a
    byte-incrementing offset, issuing unaligned 32-bit MMIO. ARM64 raises
    an alignment fault so nothing transmits. Pack 4 bytes per
    word-aligned write instead.
    
    Signed-off-by: p-szafonimateusz <[email protected]>
---
 drivers/can/ctucanfd_pci.c | 45 ++++++++++++++++++++++++++++++++++++---------
 1 file changed, 36 insertions(+), 9 deletions(-)

diff --git a/drivers/can/ctucanfd_pci.c b/drivers/can/ctucanfd_pci.c
index ba9399ff118..2e555dc4aff 100644
--- a/drivers/can/ctucanfd_pci.c
+++ b/drivers/can/ctucanfd_pci.c
@@ -651,10 +651,19 @@ static int ctucanfd_chrdev_send(FAR struct can_dev_s *dev,
       bytes = MIN(msg->cm_hdr.ch_dlc, CAN_MAX_DLEN);
     }
 
-  for (i = 0; i < bytes; i++)
+  /* Pack bytes into aligned register writes and pad the final word. */
+
+  for (i = 0; i < bytes; i += 4)
     {
-      ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_DATA + i,
-                      msg->cm_data[i]);
+      regval  = (uint32_t)msg->cm_data[i];
+      regval |= (uint32_t)(i + 1 < bytes ? msg->cm_data[i + 1] : 0)
+                << 8;
+      regval |= (uint32_t)(i + 2 < bytes ? msg->cm_data[i + 2] : 0)
+                << 16;
+      regval |= (uint32_t)(i + 3 < bytes ? msg->cm_data[i + 3] : 0)
+                << 24;
+
+      ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_DATA + i, regval);
     }
 
   /* Set TX ready */
@@ -1170,10 +1179,19 @@ static int ctucanfd_sock_transmit(FAR struct 
netdev_lowerhalf_s *dev,
       ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_TSL, 0);
       ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_TSU, 0);
 
-      for (i = 0; i < frame->can_dlc; i++)
+      /* Pack bytes into aligned register writes and pad the final word. */
+
+      for (i = 0; i < frame->can_dlc; i += 4)
         {
-          ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_DATA + i,
-                          frame->data[i]);
+          regval  = (uint32_t)frame->data[i];
+          regval |= (uint32_t)(i + 1 < frame->can_dlc ?
+                               frame->data[i + 1] : 0) << 8;
+          regval |= (uint32_t)(i + 2 < frame->can_dlc ?
+                               frame->data[i + 2] : 0) << 16;
+          regval |= (uint32_t)(i + 3 < frame->can_dlc ?
+                               frame->data[i + 3] : 0) << 24;
+
+          ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_DATA + i, regval);
         }
     }
 #ifdef CONFIG_NET_CAN_CANFD
@@ -1216,10 +1234,19 @@ static int ctucanfd_sock_transmit(FAR struct 
netdev_lowerhalf_s *dev,
       ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_TSL, 0);
       ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_TSU, 0);
 
-      for (i = 0; i < frame->len; i++)
+      /* Pack bytes into aligned register writes and pad the final word. */
+
+      for (i = 0; i < frame->len; i += 4)
         {
-          ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_DATA + i,
-                          frame->data[i]);
+          regval  = (uint32_t)frame->data[i];
+          regval |= (uint32_t)(i + 1 < frame->len ? frame->data[i + 1] : 0)
+                    << 8;
+          regval |= (uint32_t)(i + 2 < frame->len ? frame->data[i + 2] : 0)
+                    << 16;
+          regval |= (uint32_t)(i + 3 < frame->len ? frame->data[i + 3] : 0)
+                    << 24;
+
+          ctucanfd_putreg(priv, offset + CTUCANFD_TXBUF_DATA + i, regval);
         }
     }
 #endif

Reply via email to