This is an automated email from the ASF dual-hosted git repository.
hartmannathan pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 979a5b7 stm32: convert all STM32G47X specific code to generic STM32G4
series code.
979a5b7 is described below
commit 979a5b7fd4372e362669c6760ba9d06cf5a3c552
Author: raiden00pl <raide...@railab.me>
AuthorDate: Sat Dec 5 17:14:50 2020 +0100
stm32: convert all STM32G47X specific code to generic STM32G4 series code.
This is an initial step towards supporting other STM32G4 chips.
---
arch/arm/include/stm32/chip.h | 10 +++---
arch/arm/include/stm32/irq.h | 4 +--
.../stm32/{stm32g47xxx_irq.h => stm32g4xxxx_irq.h} | 8 ++---
arch/arm/src/stm32/Kconfig | 40 +++++++++++++++++++++-
arch/arm/src/stm32/hardware/stm32_adc_v2.h | 4 +--
arch/arm/src/stm32/hardware/stm32_dma_v1.h | 2 +-
arch/arm/src/stm32/hardware/stm32_dmamux.h | 4 +--
arch/arm/src/stm32/hardware/stm32_flash.h | 38 ++++++++++----------
arch/arm/src/stm32/hardware/stm32_memorymap.h | 4 +--
arch/arm/src/stm32/hardware/stm32_pinmap.h | 4 +--
.../{stm32g474cxx_pinmap.h => stm32g4xxc_pinmap.h} | 10 +++---
.../{stm32g47xxx_pinmap.h => stm32g4xxk_pinmap.h} | 36 ++++++-------------
.../{stm32g474mxx_pinmap.h => stm32g4xxm_pinmap.h} | 10 +++---
.../{stm32g47xxx_pinmap.h => stm32g4xxp_pinmap.h} | 36 ++++++-------------
.../{stm32g474qxx_pinmap.h => stm32g4xxq_pinmap.h} | 10 +++---
.../{stm32g474rxx_pinmap.h => stm32g4xxr_pinmap.h} | 10 +++---
.../{stm32g474vxx_pinmap.h => stm32g4xxv_pinmap.h} | 10 +++---
.../{stm32g47xxx_dmamux.h => stm32g4xxxx_dmamux.h} | 17 +++++----
.../{stm32g47xxx_gpio.h => stm32g4xxxx_gpio.h} | 8 ++---
...2g47xxx_memorymap.h => stm32g4xxxx_memorymap.h} | 10 +++---
.../{stm32g47xxx_pinmap.h => stm32g4xxxx_pinmap.h} | 34 ++++++++++--------
.../{stm32g47xxx_pwr.h => stm32g4xxxx_pwr.h} | 8 ++---
.../{stm32g47xxx_rcc.h => stm32g4xxxx_rcc.h} | 10 +++---
.../{stm32g47xxx_syscfg.h => stm32g4xxxx_syscfg.h} | 8 ++---
.../{stm32g47xxx_uart.h => stm32g4xxxx_uart.h} | 8 ++---
...stm32g47xxx_vrefbuf.h => stm32g4xxxx_vrefbuf.h} | 8 ++---
arch/arm/src/stm32/stm32_allocateheap.c | 13 +++++--
arch/arm/src/stm32/stm32_dma_v1.c | 4 +--
arch/arm/src/stm32/stm32_dumpgpio.c | 2 +-
arch/arm/src/stm32/stm32_gpio.c | 12 +++----
arch/arm/src/stm32/stm32_gpio.h | 8 ++---
arch/arm/src/stm32/stm32_lowputc.c | 10 +++---
arch/arm/src/stm32/stm32_rcc.c | 4 +--
arch/arm/src/stm32/stm32_rcc.h | 4 +--
arch/arm/src/stm32/stm32_serial.c | 12 +++----
arch/arm/src/stm32/stm32_syscfg.h | 4 +--
arch/arm/src/stm32/stm32_uart.h | 4 +--
.../stm32/{stm32g47xxx_rcc.c => stm32g4xxxx_rcc.c} | 6 ++--
38 files changed, 229 insertions(+), 205 deletions(-)
diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h
index d7b08ec..e77c10c 100644
--- a/arch/arm/include/stm32/chip.h
+++ b/arch/arm/include/stm32/chip.h
@@ -80,10 +80,10 @@
#else
# define __HAVE_F4 0
#endif
-#ifdef CONFIG_STM32_STM32G47XX
-# define __HAVE_G47 1
+#ifdef CONFIG_STM32_STM32G4XXX
+# define __HAVE_G4 1
#else
-# define __HAVE_G47 0
+# define __HAVE_G4 0
#endif
#ifdef CONFIG_STM32_STM32L15XX
# define __HAVE_L1 1
@@ -92,7 +92,7 @@
#endif
#if ((__HAVE_F1 + __HAVE_F2 + __HAVE_F30 + __HAVE_F33 + __HAVE_F37 + __HAVE_F4
+ \
- __HAVE_G47 + __HAVE_L1) != 1)
+ __HAVE_G4 + __HAVE_L1) != 1)
# error "Only one STM32 family must be selected !"
#endif
@@ -2514,7 +2514,7 @@
#elif defined(CONFIG_STM32_STM32F4XXX)
# define STM32_HAVE_IP_SPI_V2
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define STM32_HAVE_IP_SPI_V4
#elif defined(CONFIG_STM32_STM32L15XX)
diff --git a/arch/arm/include/stm32/irq.h b/arch/arm/include/stm32/irq.h
index 892c6f0..818820d 100644
--- a/arch/arm/include/stm32/irq.h
+++ b/arch/arm/include/stm32/irq.h
@@ -95,8 +95,8 @@
# include <arch/stm32/stm32f37xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F4XXX)
# include <arch/stm32/stm32f40xxx_irq.h>
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include <arch/stm32/stm32g47xxx_irq.h>
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include <arch/stm32/stm32g4xxxx_irq.h>
#else
# error "Unsupported STM32 chip"
#endif
diff --git a/arch/arm/include/stm32/stm32g47xxx_irq.h
b/arch/arm/include/stm32/stm32g4xxxx_irq.h
similarity index 98%
rename from arch/arm/include/stm32/stm32g47xxx_irq.h
rename to arch/arm/include/stm32/stm32g4xxxx_irq.h
index 4daf9d4..d998ab6 100644
--- a/arch/arm/include/stm32/stm32g47xxx_irq.h
+++ b/arch/arm/include/stm32/stm32g4xxxx_irq.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/include/stm32/stm32g47xxx_irq.h
+ * arch/arm/include/stm32/stm32g4xxxx_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -22,8 +22,8 @@
* through nuttx/irq.h
*/
-#ifndef __ARCH_ARM_INCLUDE_STM32_STM32G47XXX_IRQ_H
-#define __ARCH_ARM_INCLUDE_STM32_STM32G47XXX_IRQ_H
+#ifndef __ARCH_ARM_INCLUDE_STM32_STM32G4XXXX_IRQ_H
+#define __ARCH_ARM_INCLUDE_STM32_STM32G4XXXX_IRQ_H
/****************************************************************************************************
* Included Files
@@ -197,4 +197,4 @@ extern "C"
#endif
#endif
-#endif /* __ARCH_ARM_INCLUDE_STM32F30XXX_IRQ_H */
+#endif /* __ARCH_ARM_INCLUDE_STM32_STM32G4XXXX_IRQ_H */
diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig
index 73031cd..1a3fc98 100644
--- a/arch/arm/src/stm32/Kconfig
+++ b/arch/arm/src/stm32/Kconfig
@@ -1147,26 +1147,31 @@ config ARCH_CHIP_STM32F469N
config ARCH_CHIP_STM32G474C
bool "STM32G474C"
select STM32_STM32G47XX
+ select STM32_STM32G4XXC
select STM32_STM32G474C
config ARCH_CHIP_STM32G474M
bool "STM32G474M"
select STM32_STM32G47XX
+ select STM32_STM32G4XXM
select STM32_STM32G474M
config ARCH_CHIP_STM32G474R
bool "STM32G474R"
select STM32_STM32G47XX
+ select STM32_STM32G4XXR
select STM32_STM32G474R
config ARCH_CHIP_STM32G474Q
bool "STM32G474Q"
select STM32_STM32G47XX
+ select STM32_STM32G4XXQ
select STM32_STM32G474Q
config ARCH_CHIP_STM32G474V
bool "STM32G474V"
select STM32_STM32G47XX
+ select STM32_STM32G4XXV
select STM32_STM32G474V
endchoice
@@ -1883,9 +1888,42 @@ config STM32_STM32F469
select STM32_HAVE_I2S3
select STM32_HAVE_I2C3
+config STM32_STM32G4XXX
+ bool
+ default n
+
+config STM32_STM32G4XXK
+ bool
+ default n
+
+config STM32_STM32G4XXC
+ bool
+ default n
+
+config STM32_STM32G4XXR
+ bool
+ default n
+
+config STM32_STM32G4XXM
+ bool
+ default n
+
+config STM32_STM32G4XXV
+ bool
+ default n
+
+config STM32_STM32G4XXP
+ bool
+ default n
+
+config STM32_STM32G4XXQ
+ bool
+ default n
+
config STM32_STM32G47XX
bool
default n
+ select STM32_STM32G4XXX
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select STM32_HAVE_ADC2
@@ -2916,7 +2954,7 @@ config STM32_SPI6
config STM32_SYSCFG
bool "SYSCFG"
default y
- depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F33XX ||
STM32_STM32F37XX || STM32_STM32F20XX || STM32_STM32F4XXX || STM32_STM32G47XX ||
STM32_CONNECTIVITYLINE
+ depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F33XX ||
STM32_STM32F37XX || STM32_STM32F20XX || STM32_STM32F4XXX || STM32_STM32G4XXX ||
STM32_CONNECTIVITYLINE
config STM32_TIM1
bool "TIM1"
diff --git a/arch/arm/src/stm32/hardware/stm32_adc_v2.h
b/arch/arm/src/stm32/hardware/stm32_adc_v2.h
index 4deae87..0d2a111 100644
--- a/arch/arm/src/stm32/hardware/stm32_adc_v2.h
+++ b/arch/arm/src/stm32/hardware/stm32_adc_v2.h
@@ -379,7 +379,7 @@
# define ADC34_CFGR1_EXTSEL_T7TRGO (13 << ADC_CFGR1_EXTSEL_SHIFT)
# define ADC34_CFGR1_EXTSEL_T15TRGO (14 << ADC_CFGR1_EXTSEL_SHIFT)
# define ADC34_CFGR1_EXTSEL_T2CC1 (15 << ADC_CFGR1_EXTSEL_SHIFT)
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define ADC12_CFGR1_EXTSEL_T1CC1 (0 << ADC_CFGR1_EXTSEL_SHIFT)
# define ADC12_CFGR1_EXTSEL_T1CC2 (1 << ADC_CFGR1_EXTSEL_SHIFT)
# define ADC12_CFGR1_EXTSEL_T1CC3 (2 << ADC_CFGR1_EXTSEL_SHIFT)
@@ -670,7 +670,7 @@
# define ADC34_JSQR_JEXTSEL_T2TRGO (13 << ADC_JSQR_JEXTSEL_SHIFT)
# define ADC34_JSQR_JEXTSEL_T7TRGO (14 << ADC_JSQR_JEXTSEL_SHIFT)
# define ADC34_JSQR_JEXTSEL_T15TRGO (15 << ADC_JSQR_JEXTSEL_SHIFT)
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define ADC12_JSQR_JEXTSEL_T1TRGO (0 << ADC_JSQR_JEXTSEL_SHIFT)
# define ADC12_JSQR_JEXTSEL_T1CC4 (1 << ADC_JSQR_JEXTSEL_SHIFT)
# define ADC12_JSQR_JEXTSEL_T2TRGO (2 << ADC_JSQR_JEXTSEL_SHIFT)
diff --git a/arch/arm/src/stm32/hardware/stm32_dma_v1.h
b/arch/arm/src/stm32/hardware/stm32_dma_v1.h
index 50759ed..d5ddb1d 100644
--- a/arch/arm/src/stm32/hardware/stm32_dma_v1.h
+++ b/arch/arm/src/stm32/hardware/stm32_dma_v1.h
@@ -770,7 +770,7 @@
# define DMACHAN_TIM18_UP_2 STM32_DMA2_CHAN5
# define DMACHAN_DAC2_CH1_2 STM32_DMA2_CHAN5
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
/* This family uses a DMAMUX. The code to support this needs to be ported
* to this family from STM32L4R.
diff --git a/arch/arm/src/stm32/hardware/stm32_dmamux.h
b/arch/arm/src/stm32/hardware/stm32_dmamux.h
index 9b0e9f1..f5bf998 100644
--- a/arch/arm/src/stm32/hardware/stm32_dmamux.h
+++ b/arch/arm/src/stm32/hardware/stm32_dmamux.h
@@ -168,8 +168,8 @@
/* Import DMAMUX map */
-#if defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_dmamux.h"
+#if defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_dmamux.h"
#else
# error "Unsupported STM32 sub family"
#endif
diff --git a/arch/arm/src/stm32/hardware/stm32_flash.h
b/arch/arm/src/stm32/hardware/stm32_flash.h
index bd23715..32b6bf9 100644
--- a/arch/arm/src/stm32/hardware/stm32_flash.h
+++ b/arch/arm/src/stm32/hardware/stm32_flash.h
@@ -126,7 +126,7 @@
# undef STM32_FLASH_PAGESIZE
-# elif defined(CONFIG_STM32_STM32G47XX)
+# elif defined(CONFIG_STM32_STM32G4XXX)
# define STM32_FLASH_NPAGES 32
# define STM32_FLASH_PAGESIZE 4096
@@ -193,7 +193,7 @@
/* Define the Valid Configuration the G4 */
-# elif defined(CONFIG_STM32_STM32G47XX)
+# elif defined(CONFIG_STM32_STM32G4XXX)
# if defined(CONFIG_STM32_FLASH_CONFIG_B)
# define STM32_FLASH_NPAGES 32
# define STM32_FLASH_PAGESIZE 4096
@@ -274,7 +274,7 @@
# define STM32_FLASH_WRPR2_OFFSET 0x0080
# define STM32_FLASH_WRPR3_OFFSET 0x0084
# define STM32_FLASH_WRPR4_OFFSET 0x0088
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define STM32_FLASH_PDKEYR_OFFSET 0x0004
# define STM32_FLASH_KEYR_OFFSET 0x0008
# define STM32_FLASH_OPT_KEYR_OFFSET 0x000c
@@ -337,7 +337,7 @@
# define STM32_FLASH_WRPR2
(STM32_FLASHIF_BASE+STM32_FLASH_WRPR2_OFFSET)
# define STM32_FLASH_WRPR3
(STM32_FLASHIF_BASE+STM32_FLASH_WRPR3_OFFSET)
# define STM32_FLASH_WRPR4
(STM32_FLASHIF_BASE+STM32_FLASH_WRPR4_OFFSET)
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define STM32_FLASH_PDKEYR
(STM32_FLASHIF_BASE+STM32_FLASH_PDKEYR_OFFSET)
# define STM32_FLASH_KEYR
(STM32_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET)
# define STM32_FLASH_OPT_KEYR
(STM32_FLASHIF_BASE+STM32_FLASH_OPT_KEYR_OFFSET)
@@ -392,7 +392,7 @@
# define FLASH_ACR_ACC64 (1 << 2) /* Bit 2: 64-bit access */
# define FLASH_ACR_SLEEP_PD (1 << 3) /* Bit 3: Flash mode during
Sleep */
# define FLASH_ACR_RUN_PD (1 << 4) /* Bit 4: Flash mode during Run
*/
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_ACR_LATENCY_SHIFT (0)
# define FLASH_ACR_LATENCY_MASK (0xf << FLASH_ACR_LATENCY_SHIFT)
# define FLASH_ACR_LATENCY(n) ((n) << FLASH_ACR_LATENCY_SHIFT) /* n
wait states = 0..15 */
@@ -477,7 +477,7 @@
# define FLASH_SR_OPTVERR (1 << 11) /* Bit 11: Option validity error
*/
# define FLASH_SR_OPTVERRUSR (1 << 12) /* Bit 12: Option UserValidity
Error */
# define FLASH_SR_RDERR (1 << 13) /* Bit 13: Read protected error
*/
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_SR_EOP (1 << 0) /* Bit 0: End of operation */
# define FLASH_SR_OPERR (1 << 1) /* Bit 1: Operation error */
# define FLASH_SR_PROGERR (1 << 3) /* Bit 3: Programming error */
@@ -549,7 +549,7 @@
# define FLASH_CR_EOPIE (1 << 24) /* Bit 24: End
of operation interrupt enable */
# define FLASH_CR_ERRIE (1 << 25) /* Bit 25:
Error interrupt enable */
# define FLASH_CR_LOCK (1 << 31) /* Bit 31:
Lock */
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_CR_PG (1 << 0)
# define FLASH_CR_PER (1 << 1)
# define FLASH_CR_MER1 (1 << 2)
@@ -576,7 +576,7 @@
/* Flash ECC register (ECCR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_ECCR_ADDR_ECC_SHIFT (0)
# define FLASH_ECCR_ADDR_ECC_MASK (0x7ffff << FLASH_ECCR_ADDR_ECC_SHIFT)
# define FLASH_ECCR_ADDR_ECC(n) (((n) << FLASH_ECCR_ADDR_ECC_SHIFT) &
FLASH_ECCR_ADDR_ECC_MASK)
@@ -629,7 +629,7 @@
/* Flash option register (OPTR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_OPTR_RDP_SHIFT (0)
# define FLASH_OPTR_RDP_MASK (0xff << FLASH_OPTR_RDP_SHIFT)
# define FLASH_OPTR_RDP (((n) << FLASH_OPTR_RDP_SHIFT) &
FLASH_OPTR_RDP_MASK)
@@ -664,7 +664,7 @@
/* Flash PCROP1 Start Address Register (PCROP1SR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_PCROP1SR_PCROP1_STRT_SHIFT (0)
# define FLASH_PCROP1SR_PCROP1_STRT_MASK (0x7fff <<
FLASH_PCROP1SR_PCROP1_STRT_SHIFT)
# define FLASH_PCROP1SR_PCROP1_STRT(n) (((n) <<
FLASH_PCROP1SR_PCROP1_STRT_SHIFT) & FLASH_PCROP1SR_PCROP1_STRT_MASK)
@@ -672,7 +672,7 @@
/* Flash PCROP1 End Address Register (PCROP1ER) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_PCROP1ER_PCROP1_END_SHIFT (0)
# define FLASH_PCROP1ER_PCROP1_END_MASK (0x7fff <<
FLASH_PCROP1ER_PCROP1_END_SHIFT)
# define FLASH_PCROP1ER_PCROP1_END(n) (((n) <<
FLASH_PCROP1ER_PCROP1_END_SHIFT) & FLASH_PCROP1ER_PCROP1_END_MASK)
@@ -681,7 +681,7 @@
/* Flash Bank 1 WRP Area A Address Register (WRP1AR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_WRP1AR_WRP1A_STRT_SHIFT (0)
# define FLASH_WRP1AR_WRP1A_STRT_MASK (0x7f <<
FLASH_WRP1AR_WRP1A_STRT_SHIFT)
# define FLASH_WRP1AR_WRP1A_STRT(n) (((n) <<
FLASH_WRP1AR_WRP1A_STRT_SHIFT) & FLASH_WRP1AR_WRP1A_STRT_MASK)
@@ -692,7 +692,7 @@
/* Flash Bank 1 WRP Area B Address Register (WRPB1R) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_WRP1BR_WRP1B_STRT_SHIFT (0)
# define FLASH_WRP1BR_WRP1B_STRT_MASK (0x7f <<
FLASH_WRP1BR_WRP1B_STRT_SHIFT)
# define FLASH_WRP1BR_WRP1B_STRT(n) (((n) <<
FLASH_WRP1BR_WRP1B_STRT_SHIFT) & FLASH_WRP1BR_WRP1B_STRT_MASK)
@@ -703,7 +703,7 @@
/* Flash PCROP2 Start Address Register (PCROP2SR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_PCROP2SR_PCROP2_STRT_SHIFT (0)
# define FLASH_PCROP2SR_PCROP2_STRT_MASK (0x7fff <<
FLASH_PCROP2SR_PCROP2_STRT_SHIFT)
# define FLASH_PCROP2SR_PCROP2_STRT(n) (((n) <<
FLASH_PCROP2SR_PCROP2_STRT_SHIFT) & FLASH_PCROP2SR_PCROP2_STRT_MASK)
@@ -711,7 +711,7 @@
/* Flash PCROP2 End Address Register (PCROP2ER) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_PCROP2ER_PCROP2_END_SHIFT (0)
# define FLASH_PCROP2ER_PCROP2_END_MASK (0x7fff <<
FLASH_PCROP2ER_PCROP2_END_SHIFT)
# define FLASH_PCROP2ER_PCROP2_END(n) (((n) <<
FLASH_PCROP2ER_PCROP2_END_SHIFT) & FLASH_PCROP2ER_PCROP2_END_MASK)
@@ -719,7 +719,7 @@
/* Flash Bank 2 WRP Area A Address Register (WRP2AR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_WRP2AR_WRP2A_STRT_SHIFT (0)
# define FLASH_WRP2AR_WRP2A_STRT_MASK (0x7f <<
FLASH_WRP2AR_WRP2A_STRT_SHIFT)
# define FLASH_WRP2AR_WRP2A_STRT(n) (((n) <<
FLASH_WRP2AR_WRP2A_STRT_SHIFT) & FLASH_WRP2AR_WRP2A_STRT_MASK)
@@ -730,7 +730,7 @@
/* Flash Bank 2 WRP Area B Address Register (WRP2BR) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_WRP2BR_WRP2B_STRT_SHIFT (0)
# define FLASH_WRP2BR_WRP2B_STRT_MASK (0x7f <<
FLASH_WRP2BR_WRP2B_STRT_SHIFT)
# define FLASH_WRP2BR_WRP2B_STRT(n) (((n) <<
FLASH_WRP2BR_WRP2B_STRT_SHIFT) & FLASH_WRP2BR_WRP2B_STRT_SHIFT)
@@ -741,7 +741,7 @@
/* Flash Securable Area Bank 1 Register (SEC1R) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_SEC1R_SEC_SIZE1_SHIFT (0)
# define FLASH_SEC1R_SEC_SIZE1_MASK (0xff <<
FLASH_SEC1R_SEC_SIZE1_SHIFT)
# define FLASH_SEC1R_SEC_SIZE1(n) (((n) <<
FLASH_SEC1R_SEC_SIZE1_SHIFT) & FLASH_SEC1R_SEC_SIZE1_MASK)
@@ -750,7 +750,7 @@
/* Flash Securable Area Bank 2 Register (SEC2R) */
-#if defined(CONFIG_STM32_STM32G47XX)
+#if defined(CONFIG_STM32_STM32G4XXX)
# define FLASH_SEC2R_SEC_SIZE2_SHIFT (0)
# define FLASH_SEC2R_SEC_SIZE2_MASK (0xff <<
FLASH_SEC2R_SEC_SIZE2_SHIFT)
# define FLASH_SEC2R_SEC_SIZE2(n) (((n) <<
FLASH_SEC2R_SEC_SIZE2_SHIFT) & FLASH_SEC2R_SEC_SIZE2_MASK)
diff --git a/arch/arm/src/stm32/hardware/stm32_memorymap.h
b/arch/arm/src/stm32/hardware/stm32_memorymap.h
index e97b601..7722ded 100644
--- a/arch/arm/src/stm32/hardware/stm32_memorymap.h
+++ b/arch/arm/src/stm32/hardware/stm32_memorymap.h
@@ -57,8 +57,8 @@
# include "hardware/stm32f37xxx_memorymap.h"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "hardware/stm32f40xxx_memorymap.h"
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_memorymap.h"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_memorymap.h"
#else
# error "Unsupported STM32 memory map"
#endif
diff --git a/arch/arm/src/stm32/hardware/stm32_pinmap.h
b/arch/arm/src/stm32/hardware/stm32_pinmap.h
index e41fed5..cf05937 100644
--- a/arch/arm/src/stm32/hardware/stm32_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32_pinmap.h
@@ -134,8 +134,8 @@
/* STM32 G4 Family
******************************************************************/
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_pinmap.h"
#else
# error "No pinmap file for this STM32 chip"
diff --git a/arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h
index 896cfac..09fb8a2 100644
--- a/arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,14 +18,14 @@
*
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474CXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474CXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXC_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXC_PINMAP_H
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
-/* Alternate Pin Functions. All members of the STM32G47xxx family share the
+/* Alternate Pin Functions. All members of the STM32G4xxxx family share the
* same pin multiplexing (although they differ in the pins physically
* available).
*
@@ -720,4 +720,4 @@
/* USB Device Full Speed
****************************************************************************/
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474CXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXC_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
similarity index 57%
copy from arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
copy to arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
index e372874..c0f624e 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
@@ -1,5 +1,5 @@
-/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
+/****************************************************************************************************
+ * arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -16,31 +16,15 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ****************************************************************************/
+
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXK_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXK_PINMAP_H
-/****************************************************************************
- * Included Files
- ****************************************************************************/
+/****************************************************************************************************
+ * Pre-processor Definitions
+
****************************************************************************************************/
-#include <nuttx/config.h>
+#error missing pinmap for STM32G4XXK
-#include "stm32_gpio.h"
-
-#if defined(CONFIG_ARCH_CHIP_STM32G474C)
-# include "stm32g474cxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474M)
-# include "stm32g474mxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474Q)
-# include "stm32g474qxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474R)
-# include "stm32g474rxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474V)
-# include "stm32g474vxx_pinmap.h"
-#else
-# error "Unknown STM32G47xxx chip!"
-#endif
-
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXK_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxm_pinmap.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxm_pinmap.h
index 480f940..dca5cfc 100644
--- a/arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxm_pinmap.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxm_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,14 +18,14 @@
*
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474MXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474MXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXM_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXM_PINMAP_H
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
-/* Alternate Pin Functions. All members of the STM32G47xxx family share the
+/* Alternate Pin Functions. All members of the STM32G4xxxx family share the
* same pin multiplexing (although they differ in the pins physically
* available).
*
@@ -932,4 +932,4 @@
/* USB Device Full Speed
****************************************************************************/
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474MXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXM_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxp_pinmap.h
similarity index 57%
copy from arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
copy to arch/arm/src/stm32/hardware/stm32g4xxp_pinmap.h
index e372874..5764032 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxp_pinmap.h
@@ -1,5 +1,5 @@
-/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
+/****************************************************************************************************
+ * arch/arm/src/stm32/hardware/stm32g4xxp_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -16,31 +16,15 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ****************************************************************************/
+
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXP_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXP_PINMAP_H
-/****************************************************************************
- * Included Files
- ****************************************************************************/
+/****************************************************************************************************
+ * Pre-processor Definitions
+
****************************************************************************************************/
-#include <nuttx/config.h>
+#error missing pinmap for STM32G4XXP
-#include "stm32_gpio.h"
-
-#if defined(CONFIG_ARCH_CHIP_STM32G474C)
-# include "stm32g474cxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474M)
-# include "stm32g474mxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474Q)
-# include "stm32g474qxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474R)
-# include "stm32g474rxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474V)
-# include "stm32g474vxx_pinmap.h"
-#else
-# error "Unknown STM32G47xxx chip!"
-#endif
-
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXP_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxq_pinmap.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxq_pinmap.h
index aa6e09f..859ffca 100644
--- a/arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxq_pinmap.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxq_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,14 +18,14 @@
*
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474QXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474QXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXQ_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXQ_PINMAP_H
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
-/* Alternate Pin Functions. All members of the STM32G47xxx family share the
+/* Alternate Pin Functions. All members of the STM32G4xxxx family share the
* same pin multiplexing (although they differ in the pins physically
* available).
*
@@ -1228,4 +1228,4 @@
/* USB Device Full Speed
****************************************************************************/
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474QXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXQ_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxr_pinmap.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxr_pinmap.h
index 74ba830..11404fe 100644
--- a/arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxr_pinmap.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxr_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,14 +18,14 @@
*
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474RXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474RXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXR_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXR_PINMAP_H
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
-/* Alternate Pin Functions. All members of the STM32G47xxx family share the
+/* Alternate Pin Functions. All members of the STM32G4xxxx family share the
* same pin multiplexing (although they differ in the pins physically
* available).
*
@@ -826,4 +826,4 @@
/* USB Device Full Speed
****************************************************************************/
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474RXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXR_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxv_pinmap.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxv_pinmap.h
index 05d8935..b54e07f 100644
--- a/arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxv_pinmap.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxv_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,14 +18,14 @@
*
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474VXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474VXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXV_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXV_PINMAP_H
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
-/* Alternate Pin Functions. All members of the STM32G47xxx family share the
+/* Alternate Pin Functions. All members of the STM32G4xxxx family share the
* same pin multiplexing (although they differ in the pins physically
* available).
*
@@ -1110,4 +1110,4 @@
/* USB Device Full Speed
****************************************************************************/
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G474VXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXV_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_dmamux.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h
similarity index 95%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_dmamux.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h
index c4287be..e547d8d 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_dmamux.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h
@@ -1,5 +1,5 @@
/************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_dmamux.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_DMAMUX_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_DMAMUX_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_DMAMUX_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_DMAMUX_H
/************************************************************************************
* Included Files
@@ -33,8 +33,13 @@
/* DMAMUX1 mapping
******************************************************************/
-/* NOTE: DMAMUX1 channels 0 to 7 are connected to DMA1 channels 0 to 7.
- * DMAMUX1 channels 8 to 15 are connected to DMA2 channels 0 to 7.
+/* For category 3 and category 4 devies:
+ * DMAMUX1 channels 0 to 7 are connected to DMA1 channels 1 to 8.
+ * DMAMUX1 channels 8 to 15 are connected to DMA2 channels 1 to 8.
+ *
+ * For category 2:
+ * DMAMUX1 channels 0 to 5 are connected to DMA1 channels 1 to 6.
+ * DMAMUX1 channels 6 to 11 are connected to DMA2 channels 1 to 6.
*/
#define DMAMUX1_REQ_MEM2MEM (0) /* Memory to
memory transfer */
@@ -154,4 +159,4 @@
#define DMAMUX1_REQ_UCPD1_RX (114) /* DMAMUX USBPD1
Rx request */
#define DMAMUX1_REQ_UCPD1_TX (115) /* DMAMUX USBPD1
Tx request */
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_DMAMUX_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_DMAMUX_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_gpio.h
similarity index 98%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_gpio.h
index 0d3c029..4edfa73 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_gpio.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_gpio.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_GPIO_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_GPIO_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_GPIO_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_GPIO_H
/****************************************************************************
* Pre-processor Definitions
@@ -337,4 +337,4 @@
#define GPIO_BRR_RESET(n) (1 << (n))
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_GPIO_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_GPIO_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_memorymap.h
similarity index 97%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_memorymap.h
index 04d8bb4..692027d 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_memorymap.h
@@ -1,5 +1,5 @@
/****************************************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,14 +18,14 @@
*
****************************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_MEMORYMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_MEMORYMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_MEMORYMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_MEMORYMAP_H
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
-/* STM32G47xxx Address Blocks
***********************************************************************/
+/* STM32G4xxxx Address Blocks
***********************************************************************/
#define STM32_CODE_BASE 0x00000000 /* 0x00000000-0x1fffffff: 512Mb
code block */
#define STM32_SRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: 512Mb
sram block */
@@ -185,4 +185,4 @@
#define STM32_DEBUGMCU_BASE 0xe0042000
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_MEMORYMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_pinmap.h
similarity index 61%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_pinmap.h
index e372874..d69d434 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_pinmap.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_PINMAP_H
/****************************************************************************
* Included Files
@@ -29,18 +29,22 @@
#include "stm32_gpio.h"
-#if defined(CONFIG_ARCH_CHIP_STM32G474C)
-# include "stm32g474cxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474M)
-# include "stm32g474mxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474Q)
-# include "stm32g474qxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474R)
-# include "stm32g474rxx_pinmap.h"
-#elif defined(CONFIG_ARCH_CHIP_STM32G474V)
-# include "stm32g474vxx_pinmap.h"
+#if defined(CONFIG_STM32_STM32G4XXK)
+# include "stm32g4xxk_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXC)
+# include "stm32g4xxc_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXR)
+# include "stm32g4xxr_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXM)
+# include "stm32g4xxm_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXV)
+# include "stm32g4xxv_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXP)
+# include "stm32g4xxp_pinmap.h"
+#elif defined(CONFIG_STM32_STM32G4XXQ)
+# include "stm32g4xxq_pinmap.h"
#else
-# error "Unknown STM32G47xxx chip!"
+# error "Unknown STM32G4xxxx chip!"
#endif
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_PINMAP_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_PINMAP_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_pwr.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_pwr.h
index 0b90d5e..0e48b10 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_pwr.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_pwr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32H7X3XX_PWR_H
-#define __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32H7X3XX_PWR_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_PWR_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_PWR_H
/****************************************************************************
* Pre-processor Definitions
@@ -450,4 +450,4 @@
#define PWR_CR5_R1MODE_SHIFT (8)
#define PWR_CR5_R1MODE (0x1 << PWR_CR5_R1MODE_SHIFT) /*
Main Regulator Range 1 Mode */
-#endif /* __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32H7X3XX_PWR_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_PWR_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
index 5dfc9c4..42b75fd 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
@@ -1,6 +1,6 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h
- * Register offsets, addresses, and bitfield defines for STM32G47xxx RCC
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
+ * Register offsets, addresses, and bitfield defines for STM32G4Xxxx RCC
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -19,8 +19,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_RCC_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_RCC_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_RCC_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_RCC_H
/****************************************************************************
* Pre-processor Definitions
@@ -674,4 +674,4 @@
#define RCC_APB1ENR_UART4EN RCC_APB1ENR1_UART4EN
#define RCC_APB1ENR_UART5EN RCC_APB1ENR1_UART5EN
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_RCC_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_RCC_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_syscfg.h
similarity index 97%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_syscfg.h
index bbebb0c..5724487 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_syscfg.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_syscfg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_SYSCFG_H
/****************************************************************************
* Included Files
@@ -165,4 +165,4 @@
#define SYSCFG_SKR_KEY_MASK (0xff << SYSCFG_SKR_KEY_SHIFT)
# define SYSCFG_SKR_KEY(n) (((n) << SYSCFG_SKR_KEY_SHIFT) &
SYSCFG_SKR_KEY_MASK)
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_SYSCFG_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_uart.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_uart.h
similarity index 99%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_uart.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_uart.h
index b37d0b2..8ebad38 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_uart.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_uart.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_uart.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_uart.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_UART_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_UART_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_UART_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_UART_H
/****************************************************************************
* Included Files
@@ -417,4 +417,4 @@
* Public Function Prototypes
****************************************************************************/
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_UART_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_UART_H */
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h
b/arch/arm/src/stm32/hardware/stm32g4xxxx_vrefbuf.h
similarity index 93%
rename from arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h
rename to arch/arm/src/stm32/hardware/stm32g4xxxx_vrefbuf.h
index b41da91..eaf5bec 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_vrefbuf.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h
+ * arch/arm/src/stm32/hardware/stm32g4xxxx_vrefbuf.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_VREFBUF_H
-#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_VREFBUF_H
+#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_VREFBUF_H
+#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_VREFBUF_H
/****************************************************************************
* Included Files
@@ -62,4 +62,4 @@
#define VREFBUF_CCR_TRIM_SHIFT (0)
#define VREFBUF_CCR_TRIM_MASK (0x3f) /*
6-bit unsigned trim code */
-#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_VREFBUF_H */
+#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_VREFBUF_H */
diff --git a/arch/arm/src/stm32/stm32_allocateheap.c
b/arch/arm/src/stm32/stm32_allocateheap.c
index 0f5da3e..b745881 100644
--- a/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/arch/arm/src/stm32/stm32_allocateheap.c
@@ -524,16 +524,25 @@
* In addition, external FSMC SRAM may be available.
*/
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
/* Set the end of system SRAM */
+#if defined(CONFIG_STM32_STM32G47XX)
# define SRAM1_END 0x20020000
+#else
+# error "Unsupported STM32G4 chip"
+#endif
/* Set the range of CCM SRAM as well (although we may not use it) */
# define SRAM2_START 0x10000000
-# define SRAM2_END 0x10008000
+
+#if defined(CONFIG_STM32_STM32G47XX)
+# define SRAM2_END 0x10008000
+#else
+# error "Unsupported STM32G4 chip"
+#endif
/* There are 4 possible SRAM configurations:
*
diff --git a/arch/arm/src/stm32/stm32_dma_v1.c
b/arch/arm/src/stm32/stm32_dma_v1.c
index d0e5582..c4c2e10 100644
--- a/arch/arm/src/stm32/stm32_dma_v1.c
+++ b/arch/arm/src/stm32/stm32_dma_v1.c
@@ -200,7 +200,7 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] =
.chan = 3,
#if defined(CONFIG_STM32_CONNECTIVITYLINE) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
- defined(CONFIG_STM32_STM32G47XX) || defined(CONFIG_STM32_STM32L15XX)
+ defined(CONFIG_STM32_STM32G4XXX) || defined(CONFIG_STM32_STM32L15XX)
.irq = STM32_IRQ_DMA2CH4,
#else
.irq = STM32_IRQ_DMA2CH45,
@@ -213,7 +213,7 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] =
.chan = 4,
#if defined(CONFIG_STM32_CONNECTIVITYLINE) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) || \
- defined(CONFIG_STM32_STM32G47XX) || defined(CONFIG_STM32_STM32L15XX)
+ defined(CONFIG_STM32_STM32G4XXX) || defined(CONFIG_STM32_STM32L15XX)
.irq = STM32_IRQ_DMA2CH5,
#else
.irq = STM32_IRQ_DMA2CH45,
diff --git a/arch/arm/src/stm32/stm32_dumpgpio.c
b/arch/arm/src/stm32/stm32_dumpgpio.c
index 3fa5157..e78981c 100644
--- a/arch/arm/src/stm32/stm32_dumpgpio.c
+++ b/arch/arm/src/stm32/stm32_dumpgpio.c
@@ -225,7 +225,7 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
}
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
DEBUGASSERT(port < STM32_NGPIO_PORTS);
_info("GPIO%c pinset: %08x base: %08x -- %s\n",
diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c
index 70f4474..6eed0a9 100644
--- a/arch/arm/src/stm32/stm32_gpio.c
+++ b/arch/arm/src/stm32/stm32_gpio.c
@@ -411,13 +411,13 @@ int stm32_configgpio(uint32_t cfgset)
/****************************************************************************
* Name: stm32_configgpio (for the STM32L15xxx, STM32F20xxx, STM32F40xxx,
- * and STM32G47XX families).
+ * and STM32G4XXX families).
****************************************************************************/
#if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
- defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32G4XXX)
int stm32_configgpio(uint32_t cfgset)
{
uintptr_t base;
@@ -563,7 +563,7 @@ int stm32_configgpio(uint32_t cfgset)
case GPIO_SPEED_40MHz: /* 40 MHz High speed output */
setting = GPIO_OSPEED_40MHz;
break;
-#elif defined(CONFIG_STM32_STM32G47XX)
+#elif defined(CONFIG_STM32_STM32G4XXX)
default:
case GPIO_SPEED_5MHz: /* 5 MHz Low speed output */
setting = GPIO_OSPEED_5MHz;
@@ -698,7 +698,7 @@ int stm32_unconfiggpio(uint32_t cfgset)
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
- defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32G4XXX)
cfgset |= GPIO_INPUT | GPIO_FLOAT;
#else
# error "Unsupported STM32 chip"
@@ -725,7 +725,7 @@ void stm32_gpiowrite(uint32_t pinset, bool value)
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
- defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32G4XXX)
uint32_t bit;
#endif
unsigned int port;
@@ -760,7 +760,7 @@ void stm32_gpiowrite(uint32_t pinset, bool value)
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
- defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32G4XXX)
if (value)
{
diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h
index 498be9f..6039b08 100644
--- a/arch/arm/src/stm32/stm32_gpio.h
+++ b/arch/arm/src/stm32/stm32_gpio.h
@@ -64,8 +64,8 @@
# include "hardware/stm32f30xxx_gpio.h"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "hardware/stm32f40xxx_gpio.h"
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_gpio.h"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_gpio.h"
#else
# error "Unrecognized STM32 chip"
#endif
@@ -207,7 +207,7 @@
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
- defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32G4XXX)
/* Each port bit of the general-purpose I/O (GPIO) ports can be
* individually configured by software in several modes:
*
@@ -301,7 +301,7 @@
# define GPIO_SPEED_2MHz (1 << GPIO_SPEED_SHIFT) /* 2 MHz Low
speed output */
# define GPIO_SPEED_10MHz (2 << GPIO_SPEED_SHIFT) /* 10 MHz
Medium speed output */
# define GPIO_SPEED_40MHz (3 << GPIO_SPEED_SHIFT) /* 40 MHz
High speed output */
-#elif defined(CONFIG_STM32_STM32G47XX) /* With
C=50pF, 2.7<VDD<3.6, DS12288 Rev2 Table 59 */
+#elif defined(CONFIG_STM32_STM32G4XXX) /* With
C=50pF, 2.7<VDD<3.6, DS12288 Rev2 Table 59 */
# define GPIO_SPEED_5MHz (0 << GPIO_SPEED_SHIFT) /* 5 MHz Low
speed output */
# define GPIO_SPEED_25MHz (1 << GPIO_SPEED_SHIFT) /* 25 MHz
Medium speed output */
# define GPIO_SPEED_50MHz (2 << GPIO_SPEED_SHIFT) /* 50 MHz
Fast speed output */
diff --git a/arch/arm/src/stm32/stm32_lowputc.c
b/arch/arm/src/stm32/stm32_lowputc.c
index 9f67bcc..afaefc8 100644
--- a/arch/arm/src/stm32/stm32_lowputc.c
+++ b/arch/arm/src/stm32/stm32_lowputc.c
@@ -235,7 +235,7 @@
# endif
# if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
# define USART_CR1_CLRBITS\
(USART_CR1_UESM | USART_CR1_RE | USART_CR1_TE | USART_CR1_PS | \
USART_CR1_PCE | USART_CR1_WAKE | USART_CR1_M | USART_CR1_MME | \
@@ -258,7 +258,7 @@
# endif
# if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
# define USART_CR2_CLRBITS \
(USART_CR2_ADDM7 | USART_CR2_LBDL | USART_CR2_LBDIE | USART_CR2_LBCL | \
USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_STOP_MASK
| \
@@ -275,7 +275,7 @@
/* CR3 settings */
# if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
# define USART_CR3_CLRBITS \
(USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL | \
@@ -296,7 +296,7 @@
/* Calculate USART BAUD rate divider */
# if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
/* Baud rate for standard USART (SPI mode included):
*
@@ -578,7 +578,7 @@ void stm32_lowsetup(void)
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
- defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32G4XXX)
void stm32_lowsetup(void)
{
diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c
index d83e1be..f132627 100644
--- a/arch/arm/src/stm32/stm32_rcc.c
+++ b/arch/arm/src/stm32/stm32_rcc.c
@@ -89,8 +89,8 @@
# include "stm32f37xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "stm32f40xxx_rcc.c"
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "stm32g47xxx_rcc.c"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "stm32g4xxxx_rcc.c"
#else
# error "Unsupported STM32 chip"
#endif
diff --git a/arch/arm/src/stm32/stm32_rcc.h b/arch/arm/src/stm32/stm32_rcc.h
index 6acb61d..6a0d5e5 100644
--- a/arch/arm/src/stm32/stm32_rcc.h
+++ b/arch/arm/src/stm32/stm32_rcc.h
@@ -59,8 +59,8 @@
# include "hardware/stm32f37xxx_rcc.h"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "hardware/stm32f40xxx_rcc.h"
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_rcc.h"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_rcc.h"
#else
# error "Unsupported STM32 chip"
#endif
diff --git a/arch/arm/src/stm32/stm32_serial.c
b/arch/arm/src/stm32/stm32_serial.c
index 29b90ac..4211ac6 100644
--- a/arch/arm/src/stm32/stm32_serial.c
+++ b/arch/arm/src/stm32/stm32_serial.c
@@ -154,7 +154,7 @@
# elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX)
|| \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
|| \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
# if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
defined(CONFIG_USART3_RXDMA)
@@ -198,7 +198,7 @@
# ifndef CONFIG_USART_RXDMAPRIO
# if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX)
|| \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
|| \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
# define CONFIG_USART_RXDMAPRIO DMA_CCR_PRIMED
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
# define CONFIG_USART_RXDMAPRIO DMA_SCR_PRIMED
@@ -208,7 +208,7 @@
# endif
# if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX)
|| \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)
|| \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
# if (CONFIG_USART_RXDMAPRIO & ~DMA_CCR_PL_MASK) != 0
# error "Illegal value for CONFIG_USART_RXDMAPRIO"
# endif
@@ -1177,7 +1177,7 @@ static void up_set_format(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
uint32_t usartdiv8;
#else
uint32_t usartdiv32;
@@ -1192,7 +1192,7 @@ static void up_set_format(struct uart_dev_s *dev)
regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)|| \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
/* This first implementation is for U[S]ARTs that support oversampling
* by 8 in additional to the standard oversampling by 16.
* With baud rate of fCK / Divider for oversampling by 16.
@@ -1882,7 +1882,7 @@ static int up_interrupt(int irq, void *context, void *arg)
else if ((priv->sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0)
{
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
- defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G47XX)
+ defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32G4XXX)
/* These errors are cleared by writing the corresponding bit to the
* interrupt clear register (ICR).
*/
diff --git a/arch/arm/src/stm32/stm32_syscfg.h
b/arch/arm/src/stm32/stm32_syscfg.h
index feb363d..54442f5 100644
--- a/arch/arm/src/stm32/stm32_syscfg.h
+++ b/arch/arm/src/stm32/stm32_syscfg.h
@@ -55,8 +55,8 @@
# include "hardware/stm32f37xxx_syscfg.h"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "hardware/stm32f40xxx_syscfg.h"
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_syscfg.h"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_syscfg.h"
#endif
/****************************************************************************************************
diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h
index 1a87544..7c06e4c 100644
--- a/arch/arm/src/stm32/stm32_uart.h
+++ b/arch/arm/src/stm32/stm32_uart.h
@@ -56,8 +56,8 @@
# include "hardware/stm32f30xxx_uart.h"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "hardware/stm32f40xxx_uart.h"
-#elif defined(CONFIG_STM32_STM32G47XX)
-# include "hardware/stm32g47xxx_uart.h"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+# include "hardware/stm32g4xxxx_uart.h"
#else
# error "Unsupported STM32 UART"
#endif
diff --git a/arch/arm/src/stm32/stm32g47xxx_rcc.c
b/arch/arm/src/stm32/stm32g4xxxx_rcc.c
similarity index 99%
rename from arch/arm/src/stm32/stm32g47xxx_rcc.c
rename to arch/arm/src/stm32/stm32g4xxxx_rcc.c
index febde57..ae234b6 100644
--- a/arch/arm/src/stm32/stm32g47xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32g4xxxx_rcc.c
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/arm/src/stm32/stm32g47xxx_rcc.c
+ * arch/arm/src/stm32/stm32g4xxxx_rcc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -19,7 +19,7 @@
****************************************************************************/
/* Unless otherwise specified, when comments in this file refer to the
- * reference manual, that is the STM32G474 Reference Manual (RM0440 Rev 2).
+ * reference manual, that is the STM32G4 Reference Manual (RM0440 Rev 2).
*
* This file requires a clocking configuration, which is set in board.h,
* consisting of some or all of the following defines:
@@ -89,7 +89,7 @@
#include <nuttx/config.h>
-#include "hardware/stm32g47xxx_pwr.h"
+#include "hardware/stm32g4xxxx_pwr.h"
/****************************************************************************
* Pre-processor Definitions
