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commit add18b9592ce235a4a8045779fc97375e2cb6985 Author: Abdelatif Guettouche <[email protected]> AuthorDate: Fri Jun 25 15:13:06 2021 +0100 arch/risc-v/esp32c3: Remove the up_textheap_init function since it's not needed anymore. Implement the up_extraheaps_init function to initialize all separate heaps. Signed-off-by: Abdelatif Guettouche <[email protected]> --- arch/risc-v/src/esp32c3/Kconfig | 1 + arch/risc-v/src/esp32c3/Make.defs | 4 ++ .../{esp32c3_textheap.c => esp32c3_extraheaps.c} | 77 ++-------------------- arch/risc-v/src/esp32c3/esp32c3_textheap.c | 13 ---- 4 files changed, 12 insertions(+), 83 deletions(-) diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig index e12fdcd..45c9713 100644 --- a/arch/risc-v/src/esp32c3/Kconfig +++ b/arch/risc-v/src/esp32c3/Kconfig @@ -159,6 +159,7 @@ config ESP32C3_DISABLE_STDC_ATOMIC config ESP32C3_RTC_HEAP bool "Use the RTC memory as a separate heap" + select ARCH_HAVE_EXTRA_HEAPS default n menu "ESP32-C3 Peripheral Support" diff --git a/arch/risc-v/src/esp32c3/Make.defs b/arch/risc-v/src/esp32c3/Make.defs index aea0f6c..bd62279 100644 --- a/arch/risc-v/src/esp32c3/Make.defs +++ b/arch/risc-v/src/esp32c3/Make.defs @@ -160,6 +160,10 @@ CHIP_CSRCS += esp32c3_efuse_table.c CHIP_CSRCS += esp32c3_efuse_lowerhalf.c endif +ifeq ($(CONFIG_ARCH_HAVE_EXTRA_HEAPS),y) +CHIP_CSRCS += esp32c3_extraheaps.c +endif + ifeq ($(CONFIG_ARCH_USE_TEXT_HEAP),y) CHIP_CSRCS += esp32c3_textheap.c endif diff --git a/arch/risc-v/src/esp32c3/esp32c3_textheap.c b/arch/risc-v/src/esp32c3/esp32c3_extraheaps.c similarity index 53% copy from arch/risc-v/src/esp32c3/esp32c3_textheap.c copy to arch/risc-v/src/esp32c3/esp32c3_extraheaps.c index fbb94bc..beb6b96 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_textheap.c +++ b/arch/risc-v/src/esp32c3/esp32c3_extraheaps.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/risc-v/src/esp32c3/esp32c3_textheap.c + * arch/risc-v/src/esp32c3/esp32c3_extraheaps.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -40,86 +40,23 @@ #endif /**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#define D_I_BUS_OFFSET 0x700000 - -/**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Name: up_textheap_init() - ****************************************************************************/ - -void up_textheap_init() -{ -#ifdef CONFIG_ESP32C3_RTC_HEAP - /* Initialize the RTC heap */ - - esp32c3_rtcheap_initialize(); -#endif -} - -/**************************************************************************** - * Name: up_textheap_memalign() + * Name: up_extraheaps_init * * Description: - * Allocate memory for module text with the specified alignment. + * Initialize any extra heap. * ****************************************************************************/ -FAR void *up_textheap_memalign(size_t align, size_t size) +void up_extraheaps_init() { - FAR void *ret = NULL; - - /* Prioritise allocating from RTC. If that fails, allocate from the - * main heap. - */ - #ifdef CONFIG_ESP32C3_RTC_HEAP - ret = esp32c3_rtcheap_memalign(align, size); -#endif - - if (ret == NULL) - { - ret = kmm_memalign(align, size); - if (ret) - { - /* kmm_memalign buffer is at the Data bus offset. Adjust it so we - * can access it from the Instruction bus. - */ - - ret += D_I_BUS_OFFSET; - } - } - - return ret; -} - -/**************************************************************************** - * Name: up_textheap_free() - * - * Description: - * Free memory for module text. - * - ****************************************************************************/ + /* Initialize the RTC heap */ -void up_textheap_free(FAR void *p) -{ - if (p) - { -#ifdef CONFIG_ESP32C3_RTC_HEAP - if (esp32c3_ptr_rtc(p)) - { - esp32c3_rtcheap_free(p); - } - else + esp32c3_rtcheap_initialize(); #endif - { - p -= D_I_BUS_OFFSET; - kmm_free(p); - } - } } + diff --git a/arch/risc-v/src/esp32c3/esp32c3_textheap.c b/arch/risc-v/src/esp32c3/esp32c3_textheap.c index fbb94bc..2bc65bf 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_textheap.c +++ b/arch/risc-v/src/esp32c3/esp32c3_textheap.c @@ -50,19 +50,6 @@ ****************************************************************************/ /**************************************************************************** - * Name: up_textheap_init() - ****************************************************************************/ - -void up_textheap_init() -{ -#ifdef CONFIG_ESP32C3_RTC_HEAP - /* Initialize the RTC heap */ - - esp32c3_rtcheap_initialize(); -#endif -} - -/**************************************************************************** * Name: up_textheap_memalign() * * Description:
