This is an automated email from the ASF dual-hosted git repository. xiaoxiang pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit bc72ccdf6a2e879cf21c1e7b1e60c4b679c2b6c0 Author: Eero Nurkkala <[email protected]> AuthorDate: Thu Oct 7 12:54:16 2021 +0300 mpfs: Kconfig/Make: add DDR support flag This adds the proper flag for introducing the DDR support. Also call the mpfs_ddr_init() at the proper location. Signed-off-by: Eero Nurkkala <[email protected]> --- arch/risc-v/src/mpfs/Kconfig | 6 ++++++ arch/risc-v/src/mpfs/Make.defs | 4 ++++ arch/risc-v/src/mpfs/mpfs_start.c | 5 +++++ 3 files changed, 15 insertions(+) diff --git a/arch/risc-v/src/mpfs/Kconfig b/arch/risc-v/src/mpfs/Kconfig index adee77b..934186d 100755 --- a/arch/risc-v/src/mpfs/Kconfig +++ b/arch/risc-v/src/mpfs/Kconfig @@ -26,6 +26,12 @@ config MPFS_BOOT_HART ---help--- The HART number which does the HW initialiization and wakes up the other harts (Default 0, E51 core) +config MPFS_DDR_INIT + bool "Initialize DDR" + default n + ---help--- + Initializes and performs DDR training on the associated DDR memory. + menu "MPFS Peripheral Support" # These "hidden" settings determine whether a peripheral option is available diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs index 22f017e..e167745 100755 --- a/arch/risc-v/src/mpfs/Make.defs +++ b/arch/risc-v/src/mpfs/Make.defs @@ -81,3 +81,7 @@ endif ifeq (${CONFIG_MPFS_HAVE_COREPWM},y) CHIP_CSRCS += mpfs_corepwm.c endif + +ifeq (${CONFIG_MPFS_DDR_INIT},y) +CHIP_CSRCS += mpfs_ddr.c +endif diff --git a/arch/risc-v/src/mpfs/mpfs_start.c b/arch/risc-v/src/mpfs/mpfs_start.c index 487fc39..ce646cb 100755 --- a/arch/risc-v/src/mpfs/mpfs_start.c +++ b/arch/risc-v/src/mpfs/mpfs_start.c @@ -31,6 +31,7 @@ #include "chip.h" #include "mpfs.h" #include "mpfs_clockconfig.h" +#include "mpfs_ddr.h" #include "mpfs_userspace.h" #include "riscv_arch.h" @@ -110,6 +111,10 @@ void __mpfs_start(uint32_t mhartid) riscv_earlyserialinit(); #endif +#ifdef CONFIG_MPFS_DDR_INIT + mpfs_ddr_init(); +#endif + showprogress('B'); g_serial_ok = true;
