pkarashchenko commented on a change in pull request #5192:
URL: https://github.com/apache/incubator-nuttx/pull/5192#discussion_r780977319



##########
File path: arch/risc-v/include/irq.h
##########
@@ -31,20 +31,450 @@
 
 /* Include chip-specific IRQ definitions (including IRQ numbers) */
 
+#include <nuttx/config.h>
+#include <arch/types.h>
+
+#ifndef __ASSEMBLY__
 #include <stdint.h>
 #include <nuttx/irq.h>
 #include <arch/csr.h>
 #include <arch/chip/irq.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* If this is a kernel build, how many nested system calls should we
+ * support?
+ */
+
+#ifndef CONFIG_SYS_NNEST
+#  define CONFIG_SYS_NNEST 2
+#endif
+
+/* Processor PC */
+
+#define REG_EPC_NDX         0
+
+/* General pupose registers
+ * $0: Zero register does not need to be saved
+ * $1: ra (return address)
+ */
+
+#define REG_X1_NDX          1
+
+/* $2: Stack POinter
+ * $3: Global Pointer
+ * $4: Thread Pointer
+ */
+
+#define REG_X2_NDX          2
+#define REG_X3_NDX          3
+#define REG_X4_NDX          4
+
+/* $5-$7 = t0-t3: Temporary registers */
+
+#define REG_X5_NDX          5
+#define REG_X6_NDX          6
+#define REG_X7_NDX          7
+
+/* $8: s0 / fp Frame pointer */
+
+#define REG_X8_NDX          8
+
+/* $89 s1 Saved register */
+
+#define REG_X9_NDX          9
+
+/* $10-$17 = a0-a7: Argument registers */
+
+#define REG_X10_NDX         10
+#define REG_X11_NDX         11
+#define REG_X12_NDX         12
+#define REG_X13_NDX         13
+#define REG_X14_NDX         14
+#define REG_X15_NDX         15
+#define REG_X16_NDX         16
+#define REG_X17_NDX         17
+
+/* $18-$27 = s2-s11: Saved registers */
+
+#define REG_X18_NDX         18
+#define REG_X19_NDX         19
+#define REG_X20_NDX         20
+#define REG_X21_NDX         21
+#define REG_X22_NDX         22
+#define REG_X23_NDX         23
+#define REG_X24_NDX         24
+#define REG_X25_NDX         25
+#define REG_X26_NDX         26
+#define REG_X27_NDX         27
+
+/* $28-31 = t3-t6: Temporary (Volatile) registers */
+
+#define REG_X28_NDX         28
+#define REG_X29_NDX         29
+#define REG_X30_NDX         30
+#define REG_X31_NDX         31
+
+/* Interrupt Context register */
+
+#define REG_INT_CTX_NDX     32
+
+#ifdef CONFIG_ARCH_RISCV_INTXCPT_EXTREGS
+  #define INT_XCPT_REGS     (33 + CONFIG_ARCH_RISCV_INTXCPT_EXTREGS)
+#else
+  #define INT_XCPT_REGS     33
+#endif
+
+#ifdef CONFIG_ARCH_RV32
+  #define INT_REG_SIZE        4

Review comment:
       ```suggestion
     #define INT_REG_SIZE      4
   ```




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