[GitHub] [incubator-nuttx] masayuki2009 commented on pull request #5650: armv7-a/armv7-r:cache: modify hardcode in cache set/way operation

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masayuki2009 commented on pull request #5650:
URL: https://github.com/apache/incubator-nuttx/pull/5650#issuecomment-1081469385


   @zhuyanlinzyl 
   I noticed that sabre-6quad:smp with the dev board (not QEMU) has the 
following issue with this PR.
   If I revert this PR, the issue does not happen.
   
   ```
   nsh> uname -a
   NuttX 10.2.0 5af1b671b6 Mar 29 2022 15:43:46 arm sabre-6quad
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK  
 USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 001000 
000448  44.8%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 001000 
000208  20.8%  CPU1 IDLE
       2     2   2   0 FIFO     Kthread N-- Running            00000000 001000 
000208  20.8%  CPU2 IDLE
       3     3   3   0 FIFO     Kthread N-- Running            00000000 001000 
000208  20.8%  CPU3 IDLE
       4     4 --- 192 RR       Kthread --- Waiting  Semaphore 00000000 002016 
000268  13.2%  hpwork 0x10821b54
       5     5   0 100 RR       Task    --- Running            00000000 002024 
001124  55.5%  nsh_main
   nsh> free
                      total       used       free    largest  nused  nfree
           Umem: 1065206176      12032 1065194144 1065194144     49      1
   nsh> smp
     Main[0]: Running on CPU0
     Main[0]: Initializing barrier
   Thread[1]: Started
     Main[0]: T
   
   ```


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