xiaoxiang781216 commented on a change in pull request #5782:
URL: https://github.com/apache/incubator-nuttx/pull/5782#discussion_r838219709



##########
File path: arch/risc-v/src/common/riscv_swint.c
##########
@@ -179,6 +187,31 @@ int riscv_swint(int irq, void *context, void *arg)
   riscv_registerdump(regs);
 #endif
 
+  /* Handle the syscall */
+
+  regs = riscv_handle_syscall(regs);
+
+  /* Report what happened.  That might difficult in the case of a context
+   * switch
+   */
+
+#ifdef CONFIG_DEBUG_SYSCALL_INFO
+  if (regs != CURRENT_REGS)
+    {
+      svcinfo("SWInt Return: Context switch!\n");
+      riscv_registerdump((const uintptr_t *)CURRENT_REGS);
+    }
+  else
+    {
+      svcinfo("SWInt Return: %d\n", regs[REG_A0]);
+    }
+#endif
+
+  return OK;
+}
+
+void *riscv_handle_syscall(uintptr_t *regs)

Review comment:
       Each CPU has a dedicated CURRENT_REGS, so it is  re-entrant from CPU 
level. For a specific CPU, if RISCV implementation follow ARM here:
   
https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv8-m/arm_doirq.c#L58-L62
   
https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv8-m/arm_doirq.c#L78-L84
   The re-entrant should work again.




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