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from c37474b risc-v/esp32c3: Fix regression on IRQ handling for ECALL
instruction
new c15b670 RISC-V: Implement option to run NuttX in supervisor mode
(S-mode)
new 71ced1f RISC-V: Implement skeleton for a per CPU structure
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/risc-v/Kconfig | 26 ++++
arch/risc-v/include/csr.h | 51 ++++++-
arch/risc-v/include/irq.h | 24 +++-
arch/risc-v/include/mode.h | 101 ++++++++++++++
arch/risc-v/include/syscall.h | 69 +++-------
arch/risc-v/src/Makefile | 6 +
arch/risc-v/src/bl602/Make.defs | 1 +
arch/risc-v/src/c906/Make.defs | 2 +-
arch/risc-v/src/common/riscv_cpuindex.c | 10 ++
arch/risc-v/src/common/riscv_exception_common.S | 142 ++++++--------------
arch/risc-v/src/common/riscv_exception_macros.S | 130 ++++++++++++++++++
arch/risc-v/src/common/riscv_fpu.S | 3 +-
arch/risc-v/src/common/riscv_getnewintctx.c | 14 +-
arch/risc-v/src/common/riscv_internal.h | 48 +++++++
.../bl602_systemreset.c => common/riscv_percpu.c} | 83 ++++++------
.../src/common/riscv_percpu.h} | 88 ++++++------
arch/risc-v/src/common/riscv_schedulesigaction.c | 25 ++--
arch/risc-v/src/common/riscv_swint.c | 20 +--
arch/risc-v/src/common/riscv_vectors.S | 9 +-
.../risc-v/src/common/supervisor}/Make.defs | 17 +--
.../riscv_perform_syscall.c} | 45 ++++---
.../src/common/supervisor/riscv_syscall_dispatch.S | 148 +++++++++++++++++++++
arch/risc-v/src/esp32c3/Make.defs | 1 +
arch/risc-v/src/fe310/Make.defs | 1 +
arch/risc-v/src/k210/Make.defs | 1 +
arch/risc-v/src/litex/Make.defs | 1 +
arch/risc-v/src/mpfs/mpfs_irq_dispatch.c | 2 +-
arch/risc-v/src/qemu-rv/Make.defs | 1 +
arch/risc-v/src/rv32m1/Make.defs | 1 +
boards/risc-v/bl602/bl602evb/src/bl602_ostest.c | 2 +
boards/risc-v/c906/smartl-c906/src/c906_ostest.c | 2 +
boards/risc-v/mpfs/common/src/mpfs_ostest.c | 2 +
boards/risc-v/qemu-rv/rv-virt/src/qemu_rv_ostest.c | 2 +
33 files changed, 775 insertions(+), 303 deletions(-)
create mode 100644 arch/risc-v/include/mode.h
create mode 100644 arch/risc-v/src/common/riscv_exception_macros.S
copy arch/risc-v/src/{bl602/bl602_systemreset.c => common/riscv_percpu.c} (63%)
copy arch/{arm/src/stm32/stm32_fdcan.h => risc-v/src/common/riscv_percpu.h}
(64%)
copy {drivers/crypto => arch/risc-v/src/common/supervisor}/Make.defs (74%)
copy arch/risc-v/src/common/{addrenv.h => supervisor/riscv_perform_syscall.c}
(65%)
create mode 100644 arch/risc-v/src/common/supervisor/riscv_syscall_dispatch.S
