pussuw commented on code in PR #5977: URL: https://github.com/apache/incubator-nuttx/pull/5977#discussion_r842468985
########## arch/risc-v/src/common/riscv_mtimer.c: ########## @@ -0,0 +1,119 @@ +/**************************************************************************** + * arch/risc-v/src/common/riscv_mtimer.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/arch.h> + +#include <arch/barriers.h> + +#include <stdint.h> + +#include "riscv_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define is_lt_u64(a, b) ((int64_t)((int64_t)(a) - (int64_t)(b)) < 0) +#define is_gtoreq_u64(a, b) !is_lt_u64(a, b) + +#ifdef CONFIG_ARCH_RV32 +# warning "Missing logic... Access to 64-bit registers needs fixing" +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Memory mapped register base addresses */ + +static volatile uintptr_t g_mtimecmp_base; +static volatile uintptr_t g_mtime; + +/* Amount of M-mode ticks for one OS tick */ + +static volatile uint64_t g_tick; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void riscv_init_mtimer(uintptr_t mcmpbase, uintptr_t mtime, uint64_t tick) Review Comment: Ok, let's see how your timer fits. A last note: I used this implementation as the timer driver for the nuttx SBI (with modifications of course) but maybe your timer fits for that too! -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
