xiaoxiang781216 commented on code in PR #6151:
URL: https://github.com/apache/incubator-nuttx/pull/6151#discussion_r859589549
##########
arch/risc-v/src/common/riscv_mtimer.c:
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@@ -104,7 +110,16 @@ static void riscv_mtimer_set_mtimecmp(struct
riscv_mtimer_lowerhalf_s *priv,
uint64_t value)
{
#ifdef CONFIG_ARCH_RV64
- putreg64(value, priv->mtimecmp);
+ if (-1 == priv->mtime)
+ {
+ putreg32(0, priv->mtimecmp);
+ putreg32((uint32_t)(value >> 32), priv->mtimecmp + 4);
+ putreg32((uint32_t)value, priv->mtimecmp);
+ }
+ else
+ {
+ putreg64(value, priv->mtimecmp);
+ }
Review Comment:
This sequence is suggested by
spec(https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf):
```
# New comparand is in a1:a0.
li t0, -1
la t1, mtimecmp
sw t0, 0(t1) # No smaller than old value.
sw a1, 4(t1) # No smaller than new value.
sw a0, 0(t1) # New value.
Figure 3.29: Sample code for setting the 64-bit time comparand in RV32,
assuming a little-endian
memory system and that the registers live in a strongly ordered I/O region.
Storing -1 to the
low-order bits of mtimecmp prevents mtimecmp from temporarily becoming
smaller than the lesser
of the old and new values.
```
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