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xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 3f65b562bb arch: inline up_interrupt_context()
3f65b562bb is described below
commit 3f65b562bb2a686f42a5709603b8d9ce33f2ce86
Author: chao.an <anc...@xiaomi.com>
AuthorDate: Tue May 17 12:16:29 2022 +0800
arch: inline up_interrupt_context()
inline the up_interrupt_context() to avoid unnecessary stack pushes
Signed-off-by: chao.an <anc...@xiaomi.com>
---
arch/arm/include/irq.h | 92 +++++++++++++++++++++++
arch/arm/src/common/Make.defs | 2 +-
arch/arm/src/common/arm_internal.h | 13 ----
arch/arm/src/common/arm_interruptcontext.c | 58 --------------
arch/avr/include/irq.h | 66 +++++++++++++---
arch/avr/src/at32uc3/Make.defs | 2 +-
arch/avr/src/at90usb/Make.defs | 2 +-
arch/avr/src/atmega/Make.defs | 2 +-
arch/avr/src/avr/avr.h | 6 --
arch/avr/src/avr32/avr32.h | 6 --
arch/avr/src/common/up_internal.h | 2 +
arch/avr/src/common/up_interruptcontext.c | 55 --------------
arch/ceva/include/irq.h | 90 ++++++++++++++++++++++
arch/ceva/src/common/up_internal.h | 13 ----
arch/ceva/src/common/up_interruptcontext.c | 45 -----------
arch/hc/include/irq.h | 64 +++++++++++++---
arch/hc/src/common/up_internal.h | 7 +-
arch/hc/src/common/up_interruptcontext.c | 56 --------------
arch/hc/src/m9s12/Make.defs | 2 +-
arch/mips/include/irq.h | 66 +++++++++++++---
arch/mips/src/common/mips_internal.h | 13 ----
arch/mips/src/common/mips_interruptcontext.c | 55 --------------
arch/mips/src/pic32mx/Make.defs | 2 +-
arch/mips/src/pic32mx/pic32mx_irq.c | 2 +-
arch/mips/src/pic32mz/Make.defs | 2 +-
arch/mips/src/pic32mz/pic32mz_irq.c | 2 +-
arch/misoc/include/irq.h | 60 ++++++++++++++-
arch/misoc/src/lm32/Make.defs | 2 +-
arch/misoc/src/lm32/lm32.h | 2 +-
arch/misoc/src/lm32/lm32_interruptcontext.c | 46 ------------
arch/misoc/src/minerva/Make.defs | 2 +-
arch/misoc/src/minerva/minerva.h | 1 -
arch/misoc/src/minerva/minerva_interruptcontext.c | 46 ------------
arch/or1k/include/irq.h | 91 ++++++++++++++++++++++
arch/or1k/src/common/up_internal.h | 13 ----
arch/or1k/src/common/up_interruptcontext.c | 47 ------------
arch/or1k/src/mor1kx/Make.defs | 1 -
arch/renesas/include/irq.h | 63 +++++++++++++---
arch/renesas/src/common/up_internal.h | 7 --
arch/renesas/src/common/up_interruptcontext.c | 55 --------------
arch/renesas/src/m16c/Make.defs | 2 +-
arch/renesas/src/rx65n/Make.defs | 4 +-
arch/renesas/src/sh1/Make.defs | 2 +-
arch/risc-v/include/irq.h | 73 ++++++++++++++++--
arch/risc-v/src/bl602/Make.defs | 2 +-
arch/risc-v/src/c906/Make.defs | 2 +-
arch/risc-v/src/common/riscv_internal.h | 2 -
arch/risc-v/src/common/riscv_interruptcontext.c | 69 -----------------
arch/risc-v/src/esp32c3/Make.defs | 2 +-
arch/risc-v/src/fe310/Make.defs | 2 +-
arch/risc-v/src/k210/Make.defs | 2 +-
arch/risc-v/src/litex/Make.defs | 2 +-
arch/risc-v/src/mpfs/Make.defs | 2 +-
arch/risc-v/src/qemu-rv/Make.defs | 2 +-
arch/risc-v/src/rv32m1/Make.defs | 2 +-
arch/sim/include/irq.h | 36 +++++++++
arch/sparc/include/irq.h | 62 ++++++++++++---
arch/sparc/src/bm3803/Make.defs | 2 +-
arch/sparc/src/bm3823/Make.defs | 2 +-
arch/sparc/src/common/up_internal.h | 6 --
arch/sparc/src/common/up_interruptcontext.c | 55 --------------
arch/sparc/src/sparc_v8/sparc_v8.h | 6 --
arch/x86/include/irq.h | 63 +++++++++++++---
arch/x86/src/common/up_internal.h | 6 --
arch/x86/src/common/up_interruptcontext.c | 57 --------------
arch/x86/src/qemu/Make.defs | 2 +-
arch/x86_64/include/irq.h | 45 ++++++++++-
arch/x86_64/src/common/up_internal.h | 5 --
arch/x86_64/src/common/up_interruptcontext.c | 57 --------------
arch/x86_64/src/intel64/Make.defs | 2 +-
arch/xtensa/include/irq.h | 76 ++++++++++++++++++-
arch/xtensa/src/common/xtensa.h | 13 ----
arch/xtensa/src/common/xtensa_interruptcontext.c | 58 --------------
arch/xtensa/src/esp32/Make.defs | 2 +-
arch/xtensa/src/esp32s2/Make.defs | 2 +-
arch/xtensa/src/esp32s3/Make.defs | 2 +-
arch/z16/include/irq.h | 55 ++++++++++++++
arch/z16/src/common/z16_internal.h | 13 ----
arch/z16/src/common/z16_interruptcontext.c | 48 ------------
arch/z16/src/z16f/Make.defs | 2 +-
include/nuttx/arch.h | 33 --------
81 files changed, 959 insertions(+), 1082 deletions(-)
diff --git a/arch/arm/include/irq.h b/arch/arm/include/irq.h
index 9e31257d6b..16ad3d0004 100644
--- a/arch/arm/include/irq.h
+++ b/arch/arm/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -55,4 +60,91 @@
# include <arch/arm/irq.h>
#endif
+#ifndef __ASSEMBLY__
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during interrupt
+ * processing. Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
+#define CURRENT_REGS (g_current_regs[up_cpu_index()])
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_index(void);
+#else
+# define up_cpu_index() (0)
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+static inline bool up_interrupt_context(void)
+{
+#ifdef CONFIG_SMP
+ irqstate_t flags = up_irq_save();
+#endif
+
+ bool ret = CURRENT_REGS != NULL;
+
+#ifdef CONFIG_SMP
+ up_irq_restore(flags);
+#endif
+
+ return ret;
+}
+#endif /* __ASSEMBLY__ */
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __ARCH_ARM_INCLUDE_IRQ_H */
diff --git a/arch/arm/src/common/Make.defs b/arch/arm/src/common/Make.defs
index 665cefc103..ccf8dfb063 100644
--- a/arch/arm/src/common/Make.defs
+++ b/arch/arm/src/common/Make.defs
@@ -22,7 +22,7 @@
CMN_CSRCS += arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_exit.c arm_fullcontextrestore.c
-CMN_CSRCS += arm_initialize.c arm_interruptcontext.c arm_lowputs.c
+CMN_CSRCS += arm_initialize.c arm_lowputs.c
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_modifyreg8.c arm_puts.c arm_releasepending.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_saveusercontext.c
diff --git a/arch/arm/src/common/arm_internal.h
b/arch/arm/src/common/arm_internal.h
index 4bd18f6772..fca29ff51a 100644
--- a/arch/arm/src/common/arm_internal.h
+++ b/arch/arm/src/common/arm_internal.h
@@ -160,19 +160,6 @@ extern "C"
#define EXTERN extern
#endif
-/* g_current_regs[] holds a references to the current interrupt level
- * register storage structure. If is non-NULL only during interrupt
- * processing. Access to g_current_regs[] must be through the macro
- * CURRENT_REGS for portability.
- */
-
-/* For the case of architectures with multiple CPUs, then there must be one
- * such value for each processor that can receive an interrupt.
- */
-
-EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
-#define CURRENT_REGS (g_current_regs[up_cpu_index()])
-
/* This is the beginning of heap as provided from arm_head.S.
* This is the first address in DRAM after the loaded
* program+bss+idle stack. The end of the heap is
diff --git a/arch/arm/src/common/arm_interruptcontext.c
b/arch/arm/src/common/arm_interruptcontext.c
deleted file mode 100644
index 756ff6b188..0000000000
--- a/arch/arm/src/common/arm_interruptcontext.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/****************************************************************************
- * arch/arm/src/common/arm_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "arm_internal.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- *
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
-#ifdef CONFIG_SMP
- irqstate_t flags = up_irq_save();
-#endif
-
- bool ret = CURRENT_REGS != NULL;
-
-#ifdef CONFIG_SMP
- up_irq_restore(flags);
-#endif
-
- return ret;
-}
diff --git a/arch/avr/include/irq.h b/arch/avr/include/irq.h
index 9474365d35..5e712cbe22 100644
--- a/arch/avr/include/irq.h
+++ b/arch/avr/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -55,26 +60,65 @@
* Public Types
****************************************************************************/
-/****************************************************************************
- * Inline functions
- ****************************************************************************/
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
/****************************************************************************
* Public Data
****************************************************************************/
+#ifndef __ASSEMBLY__
+/* This holds a references to the current interrupt level register storage
+ * structure. If is non-NULL only during interrupt processing.
+ */
+
+#ifdef CONFIG_ARCH_FAMILY_AVR32
+EXTERN volatile uint32_t *g_current_regs;
+#else
+EXTERN volatile uint8_t *g_current_regs;
+#endif
+
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
-#ifndef __ASSEMBLY__
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
#undef EXTERN
#ifdef __cplusplus
diff --git a/arch/avr/src/at32uc3/Make.defs b/arch/avr/src/at32uc3/Make.defs
index a501f14199..a353fc255d 100644
--- a/arch/avr/src/at32uc3/Make.defs
+++ b/arch/avr/src/at32uc3/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = up_nommuhead.S
CMN_ASRCS = up_exceptions.S up_fullcontextrestore.S up_switchcontext.S
CMN_CSRCS = up_assert.c up_allocateheap.c up_blocktask.c up_copystate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_idle.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
+CMN_CSRCS += up_initialize.c up_initialstate.c
CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
diff --git a/arch/avr/src/at90usb/Make.defs b/arch/avr/src/at90usb/Make.defs
index 5e766dae88..5e903b4298 100644
--- a/arch/avr/src/at90usb/Make.defs
+++ b/arch/avr/src/at90usb/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = at90usb_head.S
CMN_ASRCS = up_switchcontext.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c
+CMN_CSRCS += up_initialstate.c up_irq.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
diff --git a/arch/avr/src/atmega/Make.defs b/arch/avr/src/atmega/Make.defs
index 4a236fdcba..85c8ed1819 100644
--- a/arch/avr/src/atmega/Make.defs
+++ b/arch/avr/src/atmega/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = atmega_head.S
CMN_ASRCS = up_switchcontext.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c
+CMN_CSRCS += up_initialstate.c up_irq.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
diff --git a/arch/avr/src/avr/avr.h b/arch/avr/src/avr/avr.h
index 5be16b3064..32cfb6ca49 100644
--- a/arch/avr/src/avr/avr.h
+++ b/arch/avr/src/avr/avr.h
@@ -55,12 +55,6 @@
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint8_t *g_current_regs;
-
/* This is the beginning of heap as provided from up_head.S. This is the
* first address in DRAM after the loaded program+bss+idle stack. The end
* of the heap is CONFIG_RAM_END
diff --git a/arch/avr/src/avr32/avr32.h b/arch/avr/src/avr32/avr32.h
index d61a977a59..b61cde415e 100644
--- a/arch/avr/src/avr32/avr32.h
+++ b/arch/avr/src/avr32/avr32.h
@@ -65,12 +65,6 @@
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint32_t *g_current_regs;
-
/* This is the beginning of heap as provided from up_head.S. This is the
* first address in DRAM after the loaded program+bss+idle stack.
* The end of the heap is CONFIG_RAM_END
diff --git a/arch/avr/src/common/up_internal.h
b/arch/avr/src/common/up_internal.h
index 3812317f84..14dc78ec33 100644
--- a/arch/avr/src/common/up_internal.h
+++ b/arch/avr/src/common/up_internal.h
@@ -29,6 +29,8 @@
#ifndef __ASSEMBLY__
# include <stdint.h>
+# include <nuttx/arch.h>
+# include <nuttx/irq.h>
#endif
#ifdef CONFIG_ARCH_FAMILY_AVR32
diff --git a/arch/avr/src/common/up_interruptcontext.c
b/arch/avr/src/common/up_interruptcontext.c
deleted file mode 100644
index 28bcf41e73..0000000000
--- a/arch/avr/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/****************************************************************************
- * arch/avr/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/ceva/include/irq.h b/arch/ceva/include/irq.h
index bd9a98e257..36e9c63940 100644
--- a/arch/ceva/include/irq.h
+++ b/arch/ceva/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include chip-specific IRQ definitions (including IRQ numbers) */
#include <arch/chip/irq.h>
@@ -75,4 +80,89 @@
#define IRQ_VINT25 (IRQ_VINT_FIRST + 25)
#define IRQ_VINT26 (IRQ_VINT_FIRST + 26)
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during interrupt
+ * processing. Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+EXTERN uint32_t *volatile g_current_regs[CONFIG_SMP_NCPUS];
+#define CURRENT_REGS (g_current_regs[up_cpu_index()])
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_index(void);
+#else
+# define up_cpu_index() (0)
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+static inline bool up_interrupt_context(void)
+{
+#ifdef CONFIG_SMP
+ irqstate_t flags = up_irq_save();
+#endif
+ bool ret = CURRENT_REGS != NULL;
+
+#ifdef CONFIG_SMP
+ up_irq_restore(flags);
+#endif
+
+ return ret;
+}
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
#endif /* __ARCH_CEVA_INCLUDE_IRQ_H */
diff --git a/arch/ceva/src/common/up_internal.h
b/arch/ceva/src/common/up_internal.h
index c00e580294..695f3b4a59 100644
--- a/arch/ceva/src/common/up_internal.h
+++ b/arch/ceva/src/common/up_internal.h
@@ -118,19 +118,6 @@ extern "C"
#define EXTERN extern
#endif
-/* g_current_regs[] holds a references to the current interrupt level
- * register storage structure. If is non-NULL only during interrupt
- * processing. Access to g_current_regs[] must be through the macro
- * CURRENT_REGS for portability.
- */
-
-/* For the case of architectures with multiple CPUs, then there must be one
- * such value for each processor that can receive an interrupt.
- */
-
-EXTERN uint32_t *volatile g_current_regs[CONFIG_SMP_NCPUS];
-#define CURRENT_REGS (g_current_regs[up_cpu_index()])
-
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded
* program+bss+idle stack. The end of the heap is
diff --git a/arch/ceva/src/common/up_interruptcontext.c
b/arch/ceva/src/common/up_interruptcontext.c
deleted file mode 100644
index 0817df6d6a..0000000000
--- a/arch/ceva/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
- * arch/ceva/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <nuttx/arch.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return CURRENT_REGS != NULL;
-}
diff --git a/arch/hc/include/irq.h b/arch/hc/include/irq.h
index ad2c26fa96..0de76dfa88 100644
--- a/arch/hc/include/irq.h
+++ b/arch/hc/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -55,27 +60,66 @@
* Public Types
****************************************************************************/
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* This holds a references to the current interrupt level register storage
+ * structure. If is non-NULL only during interrupt processing.
+ */
+
+EXTERN volatile uint8_t *g_current_regs;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
/****************************************************************************
* Inline functions
****************************************************************************/
/****************************************************************************
- * Public Data
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
****************************************************************************/
+#define up_interrupt_context() (g_current_regs != NULL)
+
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
-#ifndef __ASSEMBLY__
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/hc/src/common/up_internal.h b/arch/hc/src/common/up_internal.h
index 4d55d3b872..29329024e6 100644
--- a/arch/hc/src/common/up_internal.h
+++ b/arch/hc/src/common/up_internal.h
@@ -29,6 +29,7 @@
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
+# include <nuttx/irq.h>
# include <stdint.h>
#endif
@@ -110,12 +111,6 @@ typedef void (*up_vector_t)(void);
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint8_t *g_current_regs;
-
/* This is the beginning of heap as provided from processor-specific logic.
* This is the first address in RAM after the loaded program+bss+idle stack.
* The end of the heap is CONFIG_RAM_END
diff --git a/arch/hc/src/common/up_interruptcontext.c
b/arch/hc/src/common/up_interruptcontext.c
deleted file mode 100644
index 4dc2428e1e..0000000000
--- a/arch/hc/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/****************************************************************************
- * arch/hc/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in the interrupt
- * handler context.
- *
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/hc/src/m9s12/Make.defs b/arch/hc/src/m9s12/Make.defs
index 52ce7690a4..432e75e582 100644
--- a/arch/hc/src/m9s12/Make.defs
+++ b/arch/hc/src/m9s12/Make.defs
@@ -21,7 +21,7 @@
HEAD_ASRC = m9s12_vectors.S
CMN_CSRCS = up_allocateheap.c up_blocktask.c up_copystate.c up_createstack.c
-CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialize.c
up_interruptcontext.c
+CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialize.c
CMN_CSRCS += up_mdelay.c up_modifyreg16.c up_modifyreg32.c up_modifyreg8.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
up_reprioritizertr.c
CMN_CSRCS += up_stackframe.c up_udelay.c up_unblocktask.c up_usestack.c
diff --git a/arch/mips/include/irq.h b/arch/mips/include/irq.h
index 3dedd7c8a4..ea289076c9 100644
--- a/arch/mips/include/irq.h
+++ b/arch/mips/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -54,26 +59,67 @@
****************************************************************************/
#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
/****************************************************************************
- * Inline functions
+ * Public Data
****************************************************************************/
+/* g_current_regs holds a references to the current interrupt level
+ * register storage structure. It is non-NULL only during interrupt
+ * processing. Access to g_current_regs must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+EXTERN volatile uint32_t *g_current_regs;
+#define CURRENT_REGS g_current_regs
+
/****************************************************************************
- * Public Data
+ * Public Function Prototypes
****************************************************************************/
/****************************************************************************
- * Public Function Prototypes
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
****************************************************************************/
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
#undef EXTERN
#ifdef __cplusplus
diff --git a/arch/mips/src/common/mips_internal.h
b/arch/mips/src/common/mips_internal.h
index 05fe2594d5..1464f00375 100644
--- a/arch/mips/src/common/mips_internal.h
+++ b/arch/mips/src/common/mips_internal.h
@@ -112,19 +112,6 @@ typedef void (*up_vector_t)(void);
****************************************************************************/
#ifndef __ASSEMBLY__
-/* g_current_regs holds a references to the current interrupt level
- * register storage structure. It is non-NULL only during interrupt
- * processing. Access to g_current_regs must be through the macro
- * CURRENT_REGS for portability.
- */
-
-/* For the case of architectures with multiple CPUs, then there must be one
- * such value for each processor that can receive an interrupt.
- */
-
-extern volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
-#define CURRENT_REGS (g_current_regs[up_cpu_index()])
-
/* This is the beginning of heap as provided from up_head.S. This is the
* first address in DRAM after the loaded program+bss+idle stack. The end
* of the heap is CONFIG_RAM_END
diff --git a/arch/mips/src/common/mips_interruptcontext.c
b/arch/mips/src/common/mips_interruptcontext.c
deleted file mode 100644
index faa19e0852..0000000000
--- a/arch/mips/src/common/mips_interruptcontext.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/****************************************************************************
- * arch/mips/src/common/mips_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "mips_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return CURRENT_REGS != NULL;
-}
diff --git a/arch/mips/src/pic32mx/Make.defs b/arch/mips/src/pic32mx/Make.defs
index 8e70e2f6c9..fae17d42df 100644
--- a/arch/mips/src/pic32mx/Make.defs
+++ b/arch/mips/src/pic32mx/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = pic32mx_head.S
CMN_ASRCS = mips_syscall0.S vfork.S
CMN_CSRCS = mips_allocateheap.c mips_assert.c mips_blocktask.c
mips_copystate.c
CMN_CSRCS += mips_createstack.c mips_doirq.c mips_exit.c mips_initialize.c
-CMN_CSRCS += mips_initialstate.c mips_interruptcontext.c mips_irq.c
mips_lowputs.c
+CMN_CSRCS += mips_initialstate.c mips_irq.c mips_lowputs.c
CMN_CSRCS += mips_mdelay.c mips_modifyreg8.c mips_modifyreg16.c
mips_modifyreg32.c
CMN_CSRCS += mips_puts.c mips_releasepending.c mips_releasestack.c
CMN_CSRCS += mips_reprioritizertr.c mips_schedulesigaction.c mips_sigdeliver.c
diff --git a/arch/mips/src/pic32mx/pic32mx_irq.c
b/arch/mips/src/pic32mx/pic32mx_irq.c
index d9b4ca78cd..2ef2268e28 100644
--- a/arch/mips/src/pic32mx/pic32mx_irq.c
+++ b/arch/mips/src/pic32mx/pic32mx_irq.c
@@ -53,7 +53,7 @@
* Public Data
****************************************************************************/
-volatile uint32_t *g_current_regs[1];
+volatile uint32_t *g_current_regs;
/****************************************************************************
* Private Data
diff --git a/arch/mips/src/pic32mz/Make.defs b/arch/mips/src/pic32mz/Make.defs
index bd667fb43e..252e4dd844 100644
--- a/arch/mips/src/pic32mz/Make.defs
+++ b/arch/mips/src/pic32mz/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = pic32mz_head.S
CMN_ASRCS = mips_syscall0.S vfork.S mips_cache.S
CMN_CSRCS = mips_allocateheap.c mips_assert.c mips_blocktask.c
mips_copystate.c
CMN_CSRCS += mips_createstack.c mips_doirq.c mips_exit.c mips_initialize.c
-CMN_CSRCS += mips_initialstate.c mips_interruptcontext.c mips_irq.c
mips_lowputs.c
+CMN_CSRCS += mips_initialstate.c mips_irq.c mips_lowputs.c
CMN_CSRCS += mips_mdelay.c mips_modifyreg8.c mips_modifyreg16.c
mips_modifyreg32.c
CMN_CSRCS += mips_puts.c mips_releasepending.c mips_releasestack.c
CMN_CSRCS += mips_reprioritizertr.c mips_schedulesigaction.c mips_sigdeliver.c
diff --git a/arch/mips/src/pic32mz/pic32mz_irq.c
b/arch/mips/src/pic32mz/pic32mz_irq.c
index 012c947dca..fe52ca7631 100644
--- a/arch/mips/src/pic32mz/pic32mz_irq.c
+++ b/arch/mips/src/pic32mz/pic32mz_irq.c
@@ -65,7 +65,7 @@
* CURRENT_REGS for portability.
*/
-volatile uint32_t *g_current_regs[1];
+volatile uint32_t *g_current_regs;
/****************************************************************************
* Private Data
diff --git a/arch/misoc/include/irq.h b/arch/misoc/include/irq.h
index 2ae10c7af5..721de62ac3 100644
--- a/arch/misoc/include/irq.h
+++ b/arch/misoc/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
#include <nuttx/irq.h>
#include <arch/chip/irq.h>
@@ -43,10 +48,6 @@
* Pre-processor Definitions
****************************************************************************/
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
@@ -56,6 +57,57 @@ extern "C"
#define EXTERN extern
#endif
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* This holds a references to the current interrupt level register storage
+ * structure. If is non-NULL only during interrupt processing.
+ */
+
+EXTERN volatile uint32_t *g_current_regs;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
irqstate_t up_irq_save(void);
irqstate_t up_irq_enable(void);
void up_irq_restore(irqstate_t flags);
diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs
index 5ac7df4c9f..17ad93efad 100644
--- a/arch/misoc/src/lm32/Make.defs
+++ b/arch/misoc/src/lm32/Make.defs
@@ -30,7 +30,7 @@ CHIP_ASRCS = lm32_syscall.S
CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c
CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_decodeirq.c
CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_exit.c lm32_idle.c
-CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c lm32_interruptcontext.c
+CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c
CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c
CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c
CHIP_CSRCS += lm32_reprioritizertr.c lm32_schedulesigaction.c lm32_sigdeliver.c
diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h
index 9d5439fe00..431c942f8f 100644
--- a/arch/misoc/src/lm32/lm32.h
+++ b/arch/misoc/src/lm32/lm32.h
@@ -29,6 +29,7 @@
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
+# include <nuttx/irq.h>
# include <sys/types.h>
# include <stdint.h>
#endif
@@ -89,7 +90,6 @@
#ifndef __ASSEMBLY__
-extern volatile uint32_t *g_current_regs;
extern uint32_t g_idle_topstack;
/****************************************************************************
diff --git a/arch/misoc/src/lm32/lm32_interruptcontext.c
b/arch/misoc/src/lm32/lm32_interruptcontext.c
deleted file mode 100644
index 055368e5a0..0000000000
--- a/arch/misoc/src/lm32/lm32_interruptcontext.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/****************************************************************************
- * arch/misoc/src/lm32/lm32_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-
-#include "lm32.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/misoc/src/minerva/Make.defs b/arch/misoc/src/minerva/Make.defs
index 0d3c688225..145e271255 100644
--- a/arch/misoc/src/minerva/Make.defs
+++ b/arch/misoc/src/minerva/Make.defs
@@ -30,7 +30,7 @@ CHIP_ASRCS = minerva_syscall.S
CHIP_CSRCS = minerva_allocateheap.c minerva_assert.c minerva_blocktask.c
CHIP_CSRCS += minerva_copystate.c minerva_createstack.c minerva_decodeirq.c
CHIP_CSRCS += minerva_doirq.c minerva_dumpstate.c minerva_exit.c minerva_idle.c
-CHIP_CSRCS += minerva_initialize.c minerva_initialstate.c
minerva_interruptcontext.c
+CHIP_CSRCS += minerva_initialize.c minerva_initialstate.c
CHIP_CSRCS += minerva_irq.c minerva_releasepending.c minerva_releasestack.c
CHIP_CSRCS += minerva_stackframe.c minerva_swint.c minerva_unblocktask.c
CHIP_CSRCS += minerva_reprioritizertr.c minerva_schedulesigaction.c
minerva_sigdeliver.c
diff --git a/arch/misoc/src/minerva/minerva.h b/arch/misoc/src/minerva/minerva.h
index e310ccc783..53b637beed 100644
--- a/arch/misoc/src/minerva/minerva.h
+++ b/arch/misoc/src/minerva/minerva.h
@@ -89,7 +89,6 @@
#ifndef __ASSEMBLY__
-extern volatile uint32_t *g_current_regs;
extern uint32_t g_idle_topstack;
/****************************************************************************
diff --git a/arch/misoc/src/minerva/minerva_interruptcontext.c
b/arch/misoc/src/minerva/minerva_interruptcontext.c
deleted file mode 100644
index 7fe6c70cb9..0000000000
--- a/arch/misoc/src/minerva/minerva_interruptcontext.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/****************************************************************************
- * arch/misoc/src/minerva/minerva_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-
-#include "minerva.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/or1k/include/irq.h b/arch/or1k/include/irq.h
index 0d2f7612be..330390035b 100644
--- a/arch/or1k/include/irq.h
+++ b/arch/or1k/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -37,4 +42,90 @@
#include <arch/chip/irq.h>
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during interrupt
+ * processing. Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
+#define CURRENT_REGS (g_current_regs[up_cpu_index()])
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_index(void);
+#else
+# define up_cpu_index() (0)
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+static inline bool up_interrupt_context(void)
+{
+#ifdef CONFIG_SMP
+ irqstate_t flags = up_irq_save();
+#endif
+
+ bool ret = CURRENT_REGS != NULL;
+
+#ifdef CONFIG_SMP
+ up_irq_restore(flags);
+#endif
+
+ return ret;
+}
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif /* __ASSEMBLY__ */
+
#endif /* __ARCH_OR1K_INCLUDE_IRQ_H */
diff --git a/arch/or1k/src/common/up_internal.h
b/arch/or1k/src/common/up_internal.h
index 9ccf6376e0..f7e7600219 100644
--- a/arch/or1k/src/common/up_internal.h
+++ b/arch/or1k/src/common/up_internal.h
@@ -131,19 +131,6 @@ extern "C"
#define EXTERN extern
#endif
-/* g_current_regs[] holds a references to the current interrupt level
- * register storage structure. If is non-NULL only during interrupt
- * processing. Access to g_current_regs[] must be through the macro
- * CURRENT_REGS for portability.
- */
-
-/* For the case of architectures with multiple CPUs, then there must be one
- * such value for each processor that can receive an interrupt.
- */
-
-EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
-#define CURRENT_REGS (g_current_regs[up_cpu_index()])
-
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded
* program+bss+idle stack. The end of the heap is
diff --git a/arch/or1k/src/common/up_interruptcontext.c
b/arch/or1k/src/common/up_interruptcontext.c
deleted file mode 100644
index 5c722fed53..0000000000
--- a/arch/or1k/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/****************************************************************************
- * arch/or1k/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return CURRENT_REGS != NULL;
-}
diff --git a/arch/or1k/src/mor1kx/Make.defs b/arch/or1k/src/mor1kx/Make.defs
index cd8f8fd33b..add82a2447 100644
--- a/arch/or1k/src/mor1kx/Make.defs
+++ b/arch/or1k/src/mor1kx/Make.defs
@@ -23,7 +23,6 @@ CMN_ASRCS = up_vectortab.S \
up_fullcontextrestore.S
CMN_CSRCS = up_initialize.c \
- up_interruptcontext.c \
up_allocateheap.c \
up_createstack.c \
up_usestack.c \
diff --git a/arch/renesas/include/irq.h b/arch/renesas/include/irq.h
index bb36b32757..b3ca38ea05 100644
--- a/arch/renesas/include/irq.h
+++ b/arch/renesas/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
#include <nuttx/irq.h>
#include <arch/chip/irq.h>
@@ -40,26 +45,62 @@
* Public Types
****************************************************************************/
-/****************************************************************************
- * Inline functions
- ****************************************************************************/
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
/****************************************************************************
* Public Data
****************************************************************************/
+/* This holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during
+ * interrupt processing.
+ */
+
+EXTERN volatile uint32_t *g_current_regs;
+
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
-#ifndef __ASSEMBLY__
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
#undef EXTERN
#ifdef __cplusplus
diff --git a/arch/renesas/src/common/up_internal.h
b/arch/renesas/src/common/up_internal.h
index 91e6c63a4e..21c3524860 100644
--- a/arch/renesas/src/common/up_internal.h
+++ b/arch/renesas/src/common/up_internal.h
@@ -109,13 +109,6 @@ typedef void (*up_vector_t)(void);
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level
- * register storage structure. If is non-NULL only during
- * interrupt processing.
- */
-
-extern volatile uint32_t *g_current_regs;
-
/* This is the beginning of heap as provided from up_head.S.
* This is the first address in DRAM after the loaded
* program+bss+idle stack. The end of the heap is
diff --git a/arch/renesas/src/common/up_interruptcontext.c
b/arch/renesas/src/common/up_interruptcontext.c
deleted file mode 100644
index 3815b45776..0000000000
--- a/arch/renesas/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/****************************************************************************
- * arch/renesas/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/renesas/src/m16c/Make.defs b/arch/renesas/src/m16c/Make.defs
index e0093e8493..dfa8949958 100644
--- a/arch/renesas/src/m16c/Make.defs
+++ b/arch/renesas/src/m16c/Make.defs
@@ -22,7 +22,7 @@ HEAD_ASRC = m16c_head.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_interruptcontext.c up_lowputs.c up_mdelay.c up_puts.c
+CMN_CSRCS += up_lowputs.c up_mdelay.c up_puts.c
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
CMN_CSRCS += up_stackframe.c up_udelay.c up_unblocktask.c up_usestack.c
diff --git a/arch/renesas/src/rx65n/Make.defs b/arch/renesas/src/rx65n/Make.defs
index 580631a968..0c5bb87445 100644
--- a/arch/renesas/src/rx65n/Make.defs
+++ b/arch/renesas/src/rx65n/Make.defs
@@ -22,7 +22,7 @@ HEAD_ASRC = rx65n_head.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_interruptcontext.c up_lowputs.c up_mdelay.c up_puts.c
+CMN_CSRCS += up_lowputs.c up_mdelay.c up_puts.c
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
CMN_CSRCS += up_stackframe.c up_udelay.c up_unblocktask.c up_usestack.c
@@ -62,4 +62,4 @@ endif
ifeq ($(CONFIG_RX65N_DTC),y)
CHIP_CSRCS += rx65n_dtc.c
-endif
\ No newline at end of file
+endif
diff --git a/arch/renesas/src/sh1/Make.defs b/arch/renesas/src/sh1/Make.defs
index fee370da60..042ee48a3a 100644
--- a/arch/renesas/src/sh1/Make.defs
+++ b/arch/renesas/src/sh1/Make.defs
@@ -22,7 +22,7 @@ HEAD_ASRC = sh1_head.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_lowputs.c
+CMN_CSRCS += up_initialstate.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_stackframe.c up_udelay.c
CMN_CSRCS += sh1_schedulesigaction.c sh1_sigdeliver.c
diff --git a/arch/risc-v/include/irq.h b/arch/risc-v/include/irq.h
index 602e10fe62..23818a5efb 100644
--- a/arch/risc-v/include/irq.h
+++ b/arch/risc-v/include/irq.h
@@ -581,6 +581,55 @@ extern "C"
#define EXTERN extern
#endif
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during interrupt
+ * processing. Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+EXTERN volatile uintptr_t *g_current_regs[CONFIG_SMP_NCPUS];
+#define CURRENT_REGS (g_current_regs[up_cpu_index()])
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_irq_enable
+ *
+ * Description:
+ * Return the current interrupt state and enable interrupts
+ *
+ ****************************************************************************/
+
+irqstate_t up_irq_enable(void);
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_index(void);
+#else
+# define up_cpu_index() (0)
+#endif
+
/****************************************************************************
* Inline Functions
****************************************************************************/
@@ -634,18 +683,28 @@ static inline void up_irq_restore(irqstate_t flags)
}
/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_irq_enable
+ * Name: up_interrupt_context
*
* Description:
- * Return the current interrupt state and enable interrupts
+ * Return true is we are currently executing in the interrupt
+ * handler context.
*
****************************************************************************/
-EXTERN irqstate_t up_irq_enable(void);
+static inline bool up_interrupt_context(void)
+{
+#ifdef CONFIG_SMP
+ irqstate_t flags = up_irq_save();
+#endif
+
+ bool ret = CURRENT_REGS != NULL;
+
+#ifdef CONFIG_SMP
+ up_irq_restore(flags);
+#endif
+
+ return ret;
+}
#undef EXTERN
#if defined(__cplusplus)
diff --git a/arch/risc-v/src/bl602/Make.defs b/arch/risc-v/src/bl602/Make.defs
index 205af29f26..1b6fbe76e4 100644
--- a/arch/risc-v/src/bl602/Make.defs
+++ b/arch/risc-v/src/bl602/Make.defs
@@ -29,7 +29,7 @@ CMN_ASRCS += riscv_vectors.S riscv_testset.S
riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c
CMN_CSRCS += riscv_createstack.c riscv_exit.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
riscv_mdelay.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c riscv_mdelay.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c
riscv_usestack.c
diff --git a/arch/risc-v/src/c906/Make.defs b/arch/risc-v/src/c906/Make.defs
index 075b739e16..779a96c74b 100644
--- a/arch/risc-v/src/c906/Make.defs
+++ b/arch/risc-v/src/c906/Make.defs
@@ -29,7 +29,7 @@ CMN_ASRCS += riscv_vectors.S riscv_testset.S
riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c
CMN_CSRCS += riscv_createstack.c riscv_exit.c riscv_exception.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
diff --git a/arch/risc-v/src/common/riscv_internal.h
b/arch/risc-v/src/common/riscv_internal.h
index 22b19f359a..ea1e723cd0 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -165,8 +165,6 @@ extern "C"
#endif
#ifndef __ASSEMBLY__
-EXTERN volatile uintptr_t *g_current_regs[CONFIG_SMP_NCPUS];
-#define CURRENT_REGS (g_current_regs[up_cpu_index()])
EXTERN uintptr_t g_idle_topstack;
/* Address of per-cpu idle stack base */
diff --git a/arch/risc-v/src/common/riscv_interruptcontext.c
b/arch/risc-v/src/common/riscv_interruptcontext.c
deleted file mode 100644
index aed4319bc7..0000000000
--- a/arch/risc-v/src/common/riscv_interruptcontext.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/****************************************************************************
- * arch/risc-v/src/common/riscv_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "riscv_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
-#ifdef CONFIG_ARCH_RV64
-#ifdef CONFIG_SMP
- irqstate_t flags = up_irq_save();
-#endif
-
- bool ret = CURRENT_REGS != NULL;
-
-#ifdef CONFIG_SMP
- up_irq_restore(flags);
-#endif
-
- return ret;
-#else
- return CURRENT_REGS != NULL;
-#endif
-}
diff --git a/arch/risc-v/src/esp32c3/Make.defs
b/arch/risc-v/src/esp32c3/Make.defs
index ab16d97406..d25da5cb20 100644
--- a/arch/risc-v/src/esp32c3/Make.defs
+++ b/arch/risc-v/src/esp32c3/Make.defs
@@ -36,7 +36,7 @@ CMN_ASRCS = riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c
CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_exit.c
riscv_exception.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
riscv_mdelay.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c riscv_mdelay.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c
riscv_usestack.c
diff --git a/arch/risc-v/src/fe310/Make.defs b/arch/risc-v/src/fe310/Make.defs
index 0d865f393b..bf49b2d0f5 100644
--- a/arch/risc-v/src/fe310/Make.defs
+++ b/arch/risc-v/src/fe310/Make.defs
@@ -29,7 +29,7 @@ CMN_ASRCS += riscv_vectors.S riscv_testset.S
riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_exception.c riscv_mtimer.c
CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_exit.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
riscv_mdelay.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c riscv_mdelay.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c
riscv_usestack.c
diff --git a/arch/risc-v/src/k210/Make.defs b/arch/risc-v/src/k210/Make.defs
index 8912c37960..6c5e10649e 100644
--- a/arch/risc-v/src/k210/Make.defs
+++ b/arch/risc-v/src/k210/Make.defs
@@ -29,7 +29,7 @@ CMN_ASRCS += riscv_vectors.S riscv_testset.S
riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_mtimer.c
CMN_CSRCS += riscv_createstack.c riscv_exit.c riscv_exception.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
diff --git a/arch/risc-v/src/litex/Make.defs b/arch/risc-v/src/litex/Make.defs
index f4230c03b1..6c565fb50b 100644
--- a/arch/risc-v/src/litex/Make.defs
+++ b/arch/risc-v/src/litex/Make.defs
@@ -29,7 +29,7 @@ CMN_ASRCS += riscv_vectors.S riscv_testset.S
riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_doirq.c riscv_exception.c
CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_exit.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
riscv_mdelay.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c riscv_mdelay.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c
riscv_usestack.c
diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs
index 8361dcd02d..faa7ae14d8 100755
--- a/arch/risc-v/src/mpfs/Make.defs
+++ b/arch/risc-v/src/mpfs/Make.defs
@@ -36,7 +36,7 @@ endif
CMN_CSRCS += riscv_initialize.c riscv_swint.c
CMN_CSRCS += riscv_createstack.c riscv_exit.c riscv_exception.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
diff --git a/arch/risc-v/src/qemu-rv/Make.defs
b/arch/risc-v/src/qemu-rv/Make.defs
index e48c85fcc8..7482134b26 100644
--- a/arch/risc-v/src/qemu-rv/Make.defs
+++ b/arch/risc-v/src/qemu-rv/Make.defs
@@ -33,7 +33,7 @@ CMN_ASRCS += riscv_vectors.S riscv_exception_common.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_mtimer.c
CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_exit.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
diff --git a/arch/risc-v/src/rv32m1/Make.defs b/arch/risc-v/src/rv32m1/Make.defs
index 3fcacd53f1..1308c11106 100644
--- a/arch/risc-v/src/rv32m1/Make.defs
+++ b/arch/risc-v/src/rv32m1/Make.defs
@@ -29,7 +29,7 @@ CMN_ASRCS = riscv_vectors.S
CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_doirq.c riscv_exception.c
CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_exit.c
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c
riscv_initialstate.c
-CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
+CMN_CSRCS += riscv_modifyreg32.c riscv_puts.c
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
diff --git a/arch/sim/include/irq.h b/arch/sim/include/irq.h
index 94b85dcaf7..3bd026eccc 100644
--- a/arch/sim/include/irq.h
+++ b/arch/sim/include/irq.h
@@ -30,6 +30,9 @@
****************************************************************************/
#include <arch/setjmp.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
/****************************************************************************
* Pre-processor Definitions
@@ -66,6 +69,28 @@ extern "C"
#define EXTERN extern
#endif
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_index(void);
+#else
+# define up_cpu_index() (0)
+#endif
+
/* Name: up_irq_save, up_irq_restore, and friends.
*
* NOTE: These functions should never be called from application code and,
@@ -78,6 +103,17 @@ extern "C"
irqstate_t up_irq_save(void);
void up_irq_restore(irqstate_t flags);
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+bool up_interrupt_context(void);
+
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/sparc/include/irq.h b/arch/sparc/include/irq.h
index 9cd23373ad..ab56c97527 100644
--- a/arch/sparc/include/irq.h
+++ b/arch/sparc/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -55,26 +60,65 @@
#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* This holds a references to the current interrupt level register storage
+ * structure. If is non-NULL only during interrupt processing.
+ */
+
+EXTERN volatile uint32_t *g_current_regs;
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
/****************************************************************************
* Inline functions
****************************************************************************/
/****************************************************************************
- * Public Data
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
****************************************************************************/
+#define up_interrupt_context() (g_current_regs != NULL)
+
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
-#ifdef __cplusplus
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/sparc/src/bm3803/Make.defs b/arch/sparc/src/bm3803/Make.defs
index 0abec6ecd8..b584b7d8ab 100644
--- a/arch/sparc/src/bm3803/Make.defs
+++ b/arch/sparc/src/bm3803/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = bm3803_head.S
CMN_ASRCS = up_syscall.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
up_systemreset.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c
+CMN_CSRCS += up_initialstate.c up_irq.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
diff --git a/arch/sparc/src/bm3823/Make.defs b/arch/sparc/src/bm3823/Make.defs
index 5b380c5361..e716b96325 100644
--- a/arch/sparc/src/bm3823/Make.defs
+++ b/arch/sparc/src/bm3823/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = bm3823_head.S
CMN_ASRCS = up_syscall.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
-CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c
+CMN_CSRCS += up_initialstate.c up_irq.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
diff --git a/arch/sparc/src/common/up_internal.h
b/arch/sparc/src/common/up_internal.h
index 34534dd57d..00f88847da 100644
--- a/arch/sparc/src/common/up_internal.h
+++ b/arch/sparc/src/common/up_internal.h
@@ -120,12 +120,6 @@ typedef void (*up_vector_t)(void);
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint32_t *g_current_regs;
-
/* This is the beginning of heap as provided from up_head.S. This is the
* first address in DRAM after the loaded program+bss+idle stack. The end
* of the heap is CONFIG_RAM_END
diff --git a/arch/sparc/src/common/up_interruptcontext.c
b/arch/sparc/src/common/up_interruptcontext.c
deleted file mode 100644
index 53415ed592..0000000000
--- a/arch/sparc/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/****************************************************************************
- * arch/sparc/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/sparc/src/sparc_v8/sparc_v8.h
b/arch/sparc/src/sparc_v8/sparc_v8.h
index b4a9c33ab6..4f73302e0e 100644
--- a/arch/sparc/src/sparc_v8/sparc_v8.h
+++ b/arch/sparc/src/sparc_v8/sparc_v8.h
@@ -54,12 +54,6 @@
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint32_t *g_current_regs;
-
/* This is the beginning of heap as provided from up_head.S.This is the first
* address in DRAM after the loaded program+bss+idle stack. The end of the
* heap is CONFIG_RAM_END
diff --git a/arch/x86/include/irq.h b/arch/x86/include/irq.h
index c647a10d6c..a29002974f 100644
--- a/arch/x86/include/irq.h
+++ b/arch/x86/include/irq.h
@@ -29,6 +29,10 @@
* Included Files
****************************************************************************/
+#ifndef __ASSEMBLY__
+# include <stddef.h>
+#endif
+
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
@@ -42,7 +46,7 @@
*/
#ifdef CONFIG_ARCH_I486
-# include <arch/i486/irq.h>
+# include <arch/i486/irq.h>
#endif
/****************************************************************************
@@ -53,14 +57,6 @@
* Public Types
****************************************************************************/
-/****************************************************************************
- * Inline functions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
@@ -74,6 +70,55 @@ extern "C"
#define EXTERN extern
#endif
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+/* This holds a references to the current interrupt level register storage
+ * structure. If is non-NULL only during interrupt processing.
+ */
+
+EXTERN volatile uint32_t *g_current_regs;
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt handler
+ * context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
+
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/x86/src/common/up_internal.h
b/arch/x86/src/common/up_internal.h
index 00647d3362..14f2db9b02 100644
--- a/arch/x86/src/common/up_internal.h
+++ b/arch/x86/src/common/up_internal.h
@@ -111,12 +111,6 @@ typedef void (*up_vector_t)(void);
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint32_t *g_current_regs;
-
/* This is the beginning of heap as provided from up_head.S. This is the
* first address in DRAM after the loaded program+bss+idle stack. The end
* of the heap is CONFIG_RAM_END
diff --git a/arch/x86/src/common/up_interruptcontext.c
b/arch/x86/src/common/up_interruptcontext.c
deleted file mode 100644
index 4b1f7a9e40..0000000000
--- a/arch/x86/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/****************************************************************************
- * arch/x86/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description:
- * Return true is we are currently executing in the interrupt handler
- * context.
- *
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/x86/src/qemu/Make.defs b/arch/x86/src/qemu/Make.defs
index f9d59c9323..9365134ea7 100644
--- a/arch/x86/src/qemu/Make.defs
+++ b/arch/x86/src/qemu/Make.defs
@@ -27,7 +27,7 @@ HEAD_ASRC = qemu_head.S
CMN_ASRCS = i486_utils.S up_syscall6.S
CMN_CSRCS += up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
+CMN_CSRCS += up_initialize.c up_initialstate.c
CMN_CSRCS += up_irq.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_regdump.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_savestate.c up_sigdeliver.c
diff --git a/arch/x86_64/include/irq.h b/arch/x86_64/include/irq.h
index de4ebf92a3..98b7cc7f82 100644
--- a/arch/x86_64/include/irq.h
+++ b/arch/x86_64/include/irq.h
@@ -53,14 +53,18 @@
* Public Types
****************************************************************************/
-/****************************************************************************
- * Inline functions
- ****************************************************************************/
-
/****************************************************************************
* Public Data
****************************************************************************/
+#ifndef __ASSEMBLY__
+/* This holds a references to the current interrupt level register storage
+ * structure. If is non-NULL only during interrupt processing.
+ */
+
+extern volatile uint64_t *g_current_regs;
+#endif
+
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
@@ -74,6 +78,39 @@ extern "C"
#define EXTERN extern
#endif
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt handler
+ * context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
+
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/x86_64/src/common/up_internal.h
b/arch/x86_64/src/common/up_internal.h
index 9552b6d29b..65e23c9b5d 100644
--- a/arch/x86_64/src/common/up_internal.h
+++ b/arch/x86_64/src/common/up_internal.h
@@ -130,11 +130,6 @@ typedef void (*up_vector_t)(void);
****************************************************************************/
#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level register storage
- * structure. If is non-NULL only during interrupt processing.
- */
-
-extern volatile uint64_t *g_current_regs;
/* This is the beginning of heap as provided from up_head.S. This is the
* first address in DRAM after the loaded program+bss+idle stack. The
diff --git a/arch/x86_64/src/common/up_interruptcontext.c
b/arch/x86_64/src/common/up_interruptcontext.c
deleted file mode 100644
index 4d0596a6bf..0000000000
--- a/arch/x86_64/src/common/up_interruptcontext.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/****************************************************************************
- * arch/x86_64/src/common/up_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "up_internal.h"
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description:
- * Return true is we are currently executing in the interrupt handler
- * context.
- *
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/x86_64/src/intel64/Make.defs
b/arch/x86_64/src/intel64/Make.defs
index 360fa4abba..6d09dde282 100644
--- a/arch/x86_64/src/intel64/Make.defs
+++ b/arch/x86_64/src/intel64/Make.defs
@@ -22,7 +22,7 @@
CMN_CSRCS += up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
up_restore_auxstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
-CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
+CMN_CSRCS += up_initialize.c up_initialstate.c
CMN_CSRCS += up_irq.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_regdump.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_savestate.c up_sigdeliver.c
diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h
index 8c4fdc8476..b8cd7a91c4 100644
--- a/arch/xtensa/include/irq.h
+++ b/arch/xtensa/include/irq.h
@@ -34,6 +34,11 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
#include <arch/types.h>
#include <arch/chip/tie.h>
#include <arch/chip/core-isa.h>
@@ -317,10 +322,6 @@ static inline void xtensa_intclear(uint32_t mask)
);
}
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
@@ -329,6 +330,25 @@ extern "C"
#define EXTERN extern
#endif
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+/* g_current_regs[] holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during interrupt
+ * processing. Access to g_current_regs[] must be through the macro
+ * CURRENT_REGS for portability.
+ */
+
+/* For the case of architectures with multiple CPUs, then there must be one
+ * such value for each processor that can receive an interrupt.
+ */
+
+EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
+#define CURRENT_REGS (g_current_regs[up_cpu_index()])
+#endif
+
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
@@ -357,6 +377,54 @@ irqstate_t xtensa_enable_interrupts(irqstate_t mask);
irqstate_t xtensa_disable_interrupts(irqstate_t mask);
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+int up_cpu_index(void);
+#else
+# define up_cpu_index() (0)
+#endif
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+static inline bool up_interrupt_context(void)
+{
+#ifdef CONFIG_SMP
+ irqstate_t flags = up_irq_save();
+#endif
+
+ bool ret = CURRENT_REGS != NULL;
+
+#ifdef CONFIG_SMP
+ up_irq_restore(flags);
+#endif
+
+ return ret;
+}
+#endif
+
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h
index 490d68d272..008d4d5452 100644
--- a/arch/xtensa/src/common/xtensa.h
+++ b/arch/xtensa/src/common/xtensa.h
@@ -162,19 +162,6 @@
****************************************************************************/
#ifndef __ASSEMBLY__
-/* g_current_regs[] holds a references to the current interrupt level
- * register storage structure. If is non-NULL only during interrupt
- * processing. Access to g_current_regs[] must be through the macro
- * CURRENT_REGS for portability.
- */
-
-/* For the case of architectures with multiple CPUs, then there must be one
- * such value for each processor that can receive an interrupt.
- */
-
-extern volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
-#define CURRENT_REGS (g_current_regs[up_cpu_index()])
-
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15
/* The (optional) interrupt stack */
diff --git a/arch/xtensa/src/common/xtensa_interruptcontext.c
b/arch/xtensa/src/common/xtensa_interruptcontext.c
deleted file mode 100644
index 6c9fcb600b..0000000000
--- a/arch/xtensa/src/common/xtensa_interruptcontext.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/common/xtensa_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdbool.h>
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "xtensa.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context on this CPU.
- *
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
-#ifdef CONFIG_SMP
- irqstate_t flags = up_irq_save();
-#endif
-
- bool ret = CURRENT_REGS != NULL;
-
-#ifdef CONFIG_SMP
- up_irq_restore(flags);
-#endif
-
- return ret;
-}
diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs
index 445c05acec..54994e0ccc 100644
--- a/arch/xtensa/src/esp32/Make.defs
+++ b/arch/xtensa/src/esp32/Make.defs
@@ -33,7 +33,7 @@ CMN_ASRCS += xtensa_sigtramp.S
CMN_CSRCS = xtensa_assert.c xtensa_blocktask.c
CMN_CSRCS += xtensa_cpenable.c xtensa_createstack.c xtensa_exit.c
-CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c
xtensa_interruptcontext.c
+CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c
CMN_CSRCS += xtensa_irqdispatch.c xtensa_lowputs.c xtensa_mdelay.c
CMN_CSRCS += xtensa_modifyreg8.c xtensa_modifyreg16.c xtensa_modifyreg32.c
CMN_CSRCS += xtensa_puts.c xtensa_releasepending.c xtensa_releasestack.c
diff --git a/arch/xtensa/src/esp32s2/Make.defs
b/arch/xtensa/src/esp32s2/Make.defs
index 6e40fa7b4d..e5b72fc27e 100644
--- a/arch/xtensa/src/esp32s2/Make.defs
+++ b/arch/xtensa/src/esp32s2/Make.defs
@@ -33,7 +33,7 @@ CMN_ASRCS += xtensa_sigtramp.S
CMN_CSRCS = xtensa_assert.c xtensa_blocktask.c
CMN_CSRCS += xtensa_cpenable.c xtensa_createstack.c xtensa_exit.c
-CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c
xtensa_interruptcontext.c
+CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c
CMN_CSRCS += xtensa_irqdispatch.c xtensa_lowputs.c xtensa_mdelay.c
CMN_CSRCS += xtensa_modifyreg8.c xtensa_modifyreg16.c xtensa_modifyreg32.c
CMN_CSRCS += xtensa_puts.c xtensa_releasepending.c xtensa_releasestack.c
diff --git a/arch/xtensa/src/esp32s3/Make.defs
b/arch/xtensa/src/esp32s3/Make.defs
index cf7d6c0808..98051ca66d 100644
--- a/arch/xtensa/src/esp32s3/Make.defs
+++ b/arch/xtensa/src/esp32s3/Make.defs
@@ -33,7 +33,7 @@ CMN_ASRCS += xtensa_sigtramp.S
CMN_CSRCS = xtensa_assert.c xtensa_blocktask.c
CMN_CSRCS += xtensa_cpenable.c xtensa_createstack.c xtensa_exit.c
-CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c
xtensa_interruptcontext.c
+CMN_CSRCS += xtensa_initialize.c xtensa_initialstate.c
CMN_CSRCS += xtensa_irqdispatch.c xtensa_lowputs.c xtensa_mdelay.c
CMN_CSRCS += xtensa_modifyreg8.c xtensa_modifyreg16.c xtensa_modifyreg32.c
CMN_CSRCS += xtensa_puts.c xtensa_releasepending.c xtensa_releasestack.c
diff --git a/arch/z16/include/irq.h b/arch/z16/include/irq.h
index 80a1ce2224..e908e81a56 100644
--- a/arch/z16/include/irq.h
+++ b/arch/z16/include/irq.h
@@ -29,6 +29,11 @@
* Included Files
****************************************************************************/
+#include <sys/types.h>
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+#endif
+
#include <nuttx/irq.h>
#include <arch/chip/irq.h>
@@ -57,6 +62,56 @@ extern "C"
#define EXTERN extern
#endif
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+/* This holds a references to the current interrupt level
+ * register storage structure. If is non-NULL only during
+ * interrupt processing.
+ */
+
+EXTERN volatile FAR chipreg_t *g_current_regs;
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_index
+ *
+ * Description:
+ * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
+ * corresponds to the currently executing CPU.
+ *
+ ****************************************************************************/
+
+#define up_cpu_index() (0)
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description:
+ * Return true is we are currently executing in the interrupt
+ * handler context.
+ *
+ ****************************************************************************/
+
+#define up_interrupt_context() (g_current_regs != NULL)
+
#undef EXTERN
#ifdef __cplusplus
}
diff --git a/arch/z16/src/common/z16_internal.h
b/arch/z16/src/common/z16_internal.h
index b1c2ff0773..5b4920c7f9 100644
--- a/arch/z16/src/common/z16_internal.h
+++ b/arch/z16/src/common/z16_internal.h
@@ -108,19 +108,6 @@
typedef void (*up_vector_t)(void);
#endif
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-#ifndef __ASSEMBLY__
-/* This holds a references to the current interrupt level
- * register storage structure. If is non-NULL only during
- * interrupt processing.
- */
-
-extern volatile FAR chipreg_t *g_current_regs;
-#endif
-
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
diff --git a/arch/z16/src/common/z16_interruptcontext.c
b/arch/z16/src/common/z16_interruptcontext.c
deleted file mode 100644
index 7965f105b3..0000000000
--- a/arch/z16/src/common/z16_interruptcontext.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/****************************************************************************
- * arch/z16/src/common/z16_interruptcontext.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdint.h>
-
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "z16_internal.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description: Return true is we are currently executing in
- * the interrupt handler context.
- ****************************************************************************/
-
-bool up_interrupt_context(void)
-{
- return g_current_regs != NULL;
-}
diff --git a/arch/z16/src/z16f/Make.defs b/arch/z16/src/z16f/Make.defs
index ab3b7713dc..ab95c4473e 100644
--- a/arch/z16/src/z16f/Make.defs
+++ b/arch/z16/src/z16f/Make.defs
@@ -22,7 +22,7 @@ HEAD_SSRC = z16f_head.S
CMN_CSRCS = z16_allocateheap.c z16_initialize.c z16_schedulesigaction.c
CMN_CSRCS += z16_assert.c z16_initialstate.c z16_sigdeliver.c z16_blocktask.c
-CMN_CSRCS += z16_interruptcontext.c z16_stackdump.c z16_copystate.c
+CMN_CSRCS += z16_stackdump.c z16_copystate.c
CMN_CSRCS += z16_mdelay.c z16_udelay.c z16_createstack.c z16_registerdump.c
CMN_CSRCS += z16_unblocktask.c z16_doirq.c z16_releasepending.c z16_usestack.c
CMN_CSRCS += z16_exit.c z16_releasestack.c z16_stackframe.c z16_idle.c
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index 7c01f21c34..23055d57e2 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1449,17 +1449,6 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages);
void up_irqinitialize(void);
-/****************************************************************************
- * Name: up_interrupt_context
- *
- * Description:
- * Return true is we are currently executing in
- * the interrupt handler context.
- *
- ****************************************************************************/
-
-bool up_interrupt_context(void);
-
/****************************************************************************
* Name: up_enable_irq
*
@@ -1951,28 +1940,6 @@ int16_t up_fetchsub16(FAR volatile int16_t *addr,
int16_t value);
int8_t up_fetchsub8(FAR volatile int8_t *addr, int8_t value);
#endif
-/****************************************************************************
- * Name: up_cpu_index
- *
- * Description:
- * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
- * corresponds to the currently executing CPU.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
- * corresponds to the currently executing CPU.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SMP
-int up_cpu_index(void);
-#else
-# define up_cpu_index() (0)
-#endif
-
/****************************************************************************
* Name: up_cpu_idlestack
*
