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The following commit(s) were added to refs/heads/master by this push:
new 31bb362aab risc-v: Fix kernel MMU mapping for L3 table
31bb362aab is described below
commit 31bb362aab2522836c60b145d3dd1d12438b1d15
Author: Ville Juven <[email protected]>
AuthorDate: Tue Aug 9 13:15:02 2022 +0300
risc-v: Fix kernel MMU mapping for L3 table
The L3 table address was calculated incorrectly. For every 2MiB of
mapped memory, an offset of 4KiB is needed from the base of the L3
table. The old calculation failed if paddr was not aligned to a 2MiB
boundary.
---
arch/risc-v/src/mpfs/mpfs_mm_init.c | 9 +++++++--
arch/risc-v/src/qemu-rv/qemu_rv_mm_init.c | 9 +++++++--
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/risc-v/src/mpfs/mpfs_mm_init.c
b/arch/risc-v/src/mpfs/mpfs_mm_init.c
index 8a35df4b6c..2e2e135a64 100644
--- a/arch/risc-v/src/mpfs/mpfs_mm_init.c
+++ b/arch/risc-v/src/mpfs/mpfs_mm_init.c
@@ -80,12 +80,17 @@ uintptr_t g_kernel_pgt_pbase = PGT_L1_PBASE;
static void map_region(uintptr_t paddr, uintptr_t vaddr, size_t size,
uint32_t mmuflags)
{
+ uintptr_t offset;
uintptr_t l3base;
uintptr_t end_vaddr;
- /* Start index for the L3 table, kernel flash is always first */
+ /* Start offset for the L3 table, kernel flash is always first */
- l3base = PGT_L3_PBASE + ((paddr - KFLASH_START) / RV_MMU_PAGE_ENTRIES);
+ offset = ((paddr - KFLASH_START) / RV_MMU_L2_PAGE_SIZE) * RV_MMU_PAGE_SIZE;
+
+ /* L3 base address per 2MiB boundary */
+
+ l3base = PGT_L3_PBASE + offset;
/* Map the region to the L3 table as a whole */
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_mm_init.c
b/arch/risc-v/src/qemu-rv/qemu_rv_mm_init.c
index 0065f9539b..3673721053 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_mm_init.c
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_mm_init.c
@@ -80,12 +80,17 @@ uintptr_t g_kernel_pgt_pbase = PGT_L1_PBASE;
static void map_region(uintptr_t paddr, uintptr_t vaddr, size_t size,
uint32_t mmuflags)
{
+ uintptr_t offset;
uintptr_t l3base;
uintptr_t end_vaddr;
- /* Start index for the L3 table, kernel flash is always first */
+ /* Start offset for the L3 table, kernel flash is always first */
- l3base = PGT_L3_PBASE + ((paddr - KFLASH_START) / RV_MMU_PAGE_ENTRIES);
+ offset = ((paddr - KFLASH_START) / RV_MMU_L2_PAGE_SIZE) * RV_MMU_PAGE_SIZE;
+
+ /* L3 base address per 2MiB boundary */
+
+ l3base = PGT_L3_PBASE + offset;
/* Map the region to the L3 table as a whole */