[incubator-nuttx] branch master updated: riscv: Dump trap val in exception handler

[xiaoxiang]

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xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new f93964ad3c riscv: Dump trap val in exception handler
f93964ad3c is described below

commit f93964ad3c8eb9123b814160932c912cb92a61c7
Author: Huang Qi <huang...@xiaomi.com>
AuthorDate: Tue Aug 30 03:39:53 2022 +0000

    riscv: Dump trap val in exception handler
    
    Signed-off-by: Huang Qi <huang...@xiaomi.com>
---
 arch/risc-v/include/mode.h               |  2 ++
 arch/risc-v/src/common/riscv_exception.c | 12 +++---------
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/risc-v/include/mode.h b/arch/risc-v/include/mode.h
index e4b3c40894..53b7014bb2 100644
--- a/arch/risc-v/include/mode.h
+++ b/arch/risc-v/include/mode.h
@@ -41,6 +41,7 @@
 #  define CSR_EPC           sepc             /* Exception program counter */
 #  define CSR_IE            sie              /* Interrupt enable register */
 #  define CSR_CAUSE         scause           /* Interrupt cause register */
+#  define CSR_TVAL          stval            /* Trap value register */
 
 /* In status register */
 
@@ -74,6 +75,7 @@
 #  define CSR_EPC           mepc             /* Exception program counter */
 #  define CSR_IE            mie              /* Interrupt enable register */
 #  define CSR_CAUSE         mcause           /* Interrupt cause register */
+#  define CSR_TVAL          mtval            /* Trap value register */
 
 /* In status register */
 
diff --git a/arch/risc-v/src/common/riscv_exception.c 
b/arch/risc-v/src/common/riscv_exception.c
index 256625ddee..b26e9514f8 100644
--- a/arch/risc-v/src/common/riscv_exception.c
+++ b/arch/risc-v/src/common/riscv_exception.c
@@ -73,15 +73,9 @@ int riscv_exception(int mcause, void *regs, void *args)
 {
   uintptr_t cause = mcause & RISCV_IRQ_MASK;
 
-  if (mcause > RISCV_MAX_EXCEPTION)
-    {
-      _alert("EXCEPTION: Unknown.  MCAUSE: %" PRIxREG "\n", cause);
-    }
-  else
-    {
-      _alert("EXCEPTION: %s. MCAUSE: %" PRIxREG "\n",
-             g_reasons_str[cause], cause);
-    }
+  _alert("EXCEPTION: %s. MCAUSE: %" PRIxREG ", MTVAL: %" PRIxREG "\n",
+         mcause > RISCV_MAX_EXCEPTION ? "Unknown" : g_reasons_str[cause],
+         cause, READ_CSR(CSR_TVAL));
 
   _alert("PANIC!!! Exception = %" PRIxREG "\n", cause);
   up_irq_save();