pkarashchenko commented on code in PR #7468: URL: https://github.com/apache/incubator-nuttx/pull/7468#discussion_r1008795001
########## boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c: ########## @@ -136,9 +136,9 @@ void stm32_selectlcd(void) /* Bank3 NOR/SRAM timing register configuration */ - putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | - FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | - FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) | + FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) | + FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) | Review Comment: Could you please write more about changes in timing configuration? -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
