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The following commit(s) were added to refs/heads/master by this push:
     new 5081cef2c9 risc-v/espressif: Add Hardware RNG support
5081cef2c9 is described below

commit 5081cef2c92cb705c132ce8a1f807a299b2551e7
Author: Gustavo Henrique Nihei <gustavo.ni...@espressif.com>
AuthorDate: Wed Mar 29 18:58:16 2023 -0300

    risc-v/espressif: Add Hardware RNG support
    
    Signed-off-by: Gustavo Henrique Nihei <gustavo.ni...@espressif.com>
---
 arch/risc-v/src/espressif/Kconfig                  |   3 +
 arch/risc-v/src/espressif/Make.defs                |   4 +
 arch/risc-v/src/espressif/esp_random.c             | 122 +++++++++++++++++++++
 arch/risc-v/src/espressif/hal_esp32c3.mk           |   1 +
 arch/risc-v/src/espressif/hal_esp32c6.mk           |   1 +
 arch/risc-v/src/espressif/hal_esp32h2.mk           |   1 +
 .../esp32c3-generic/configs/random/defconfig       |  47 ++++++++
 .../esp32c6-generic/configs/random/defconfig       |  48 ++++++++
 .../esp32h2-generic/configs/random/defconfig       |  48 ++++++++
 9 files changed, 275 insertions(+)

diff --git a/arch/risc-v/src/espressif/Kconfig 
b/arch/risc-v/src/espressif/Kconfig
index fdff52fe95..6f0c1aa3f4 100644
--- a/arch/risc-v/src/espressif/Kconfig
+++ b/arch/risc-v/src/espressif/Kconfig
@@ -18,6 +18,7 @@ config ESPRESSIF_ESP32C3
        select ARCH_HAVE_BOOTLOADER
        select ARCH_HAVE_MPU
        select ARCH_HAVE_RESET
+       select ARCH_HAVE_RNG
        select LIBC_ARCH_ATOMIC
        select LIBC_ARCH_MEMCPY
        select LIBC_ARCH_MEMCHR
@@ -44,6 +45,7 @@ config ESPRESSIF_ESP32C6
        select ARCH_HAVE_BOOTLOADER
        select ARCH_HAVE_MPU
        select ARCH_HAVE_RESET
+       select ARCH_HAVE_RNG
        select LIBC_ARCH_MEMCPY
        select LIBC_ARCH_MEMCHR
        select LIBC_ARCH_MEMCMP
@@ -68,6 +70,7 @@ config ESPRESSIF_ESP32H2
        select ARCH_HAVE_BOOTLOADER
        select ARCH_HAVE_MPU
        select ARCH_HAVE_RESET
+       select ARCH_HAVE_RNG
        select LIBC_ARCH_ATOMIC
        select LIBC_ARCH_MEMCPY
        select LIBC_ARCH_MEMCHR
diff --git a/arch/risc-v/src/espressif/Make.defs 
b/arch/risc-v/src/espressif/Make.defs
index 0fb199febb..59ab8daf1d 100644
--- a/arch/risc-v/src/espressif/Make.defs
+++ b/arch/risc-v/src/espressif/Make.defs
@@ -42,6 +42,10 @@ ifeq ($(CONFIG_WATCHDOG),y)
 CHIP_CSRCS += esp_wdt.c
 endif
 
+ifneq ($(CONFIG_DEV_RANDOM)$(CONFIG_DEV_URANDOM_ARCH),)
+CHIP_CSRCS += esp_random.c
+endif
+
 #############################################################################
 # Espressif HAL for 3rd Party Platforms
 #############################################################################
diff --git a/arch/risc-v/src/espressif/esp_random.c 
b/arch/risc-v/src/espressif/esp_random.c
new file mode 100644
index 0000000000..e2290b770e
--- /dev/null
+++ b/arch/risc-v/src/espressif/esp_random.c
@@ -0,0 +1,122 @@
+/****************************************************************************
+ * arch/risc-v/src/espressif/esp_random.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+
+#include <nuttx/fs/fs.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "esp_random.h"
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static ssize_t esp_rng_read(struct file *filep, char *buffer, size_t buflen);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct file_operations g_rngops =
+{
+  .read = esp_rng_read,       /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_rng_read
+ *
+ * Description:
+ *   Fill a buffer with random bytes from hardware RNG.
+ *
+ * Input Parameters:
+ *   filep         - Pointer to a file structure instance.
+ *   buffer        - Pointer to buffer to fill with random numbers.
+ *   buflen        - Length of buffer in bytes.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static ssize_t esp_rng_read(struct file *filep, char *buffer, size_t buflen)
+{
+  UNUSED(filep);
+
+  esp_fill_random(buffer, buflen);
+
+  return (ssize_t)buflen;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ *   Initialize the RNG hardware and register the /dev/random driver.
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+  register_driver("/dev/random", &g_rngops, 0444, NULL);
+}
+#endif
+
+/****************************************************************************
+ * Name: devurandom_register
+ *
+ * Description:
+ *   Initialize the RNG hardware and register the /dev/urandom driver.
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_URANDOM_ARCH
+void devurandom_register(void)
+{
+  register_driver("/dev/urandom", &g_rngops, 0444, NULL);
+}
+#endif
diff --git a/arch/risc-v/src/espressif/hal_esp32c3.mk 
b/arch/risc-v/src/espressif/hal_esp32c3.mk
index 9093bd21fc..6e4832d934 100644
--- a/arch/risc-v/src/espressif/hal_esp32c3.mk
+++ b/arch/risc-v/src/espressif/hal_esp32c3.mk
@@ -67,6 +67,7 @@ CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/es
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/esp_efuse_utility.c
 CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/cpu.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/esp_clk.c
+CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/hw_random.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/periph_ctrl.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/regi2c_ctrl.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/clk_tree_common.c
diff --git a/arch/risc-v/src/espressif/hal_esp32c6.mk 
b/arch/risc-v/src/espressif/hal_esp32c6.mk
index 6039085bf4..e88afde137 100644
--- a/arch/risc-v/src/espressif/hal_esp32c6.mk
+++ b/arch/risc-v/src/espressif/hal_esp32c6.mk
@@ -68,6 +68,7 @@ CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/es
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/esp_efuse_utility.c
 CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/cpu.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/esp_clk.c
+CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/hw_random.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/modem_clock.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/periph_ctrl.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/regi2c_ctrl.c
diff --git a/arch/risc-v/src/espressif/hal_esp32h2.mk 
b/arch/risc-v/src/espressif/hal_esp32h2.mk
index 63ea4b882a..f49427fca3 100644
--- a/arch/risc-v/src/espressif/hal_esp32h2.mk
+++ b/arch/risc-v/src/espressif/hal_esp32h2.mk
@@ -68,6 +68,7 @@ CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/es
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/efuse/$(CHIP_SERIES)/esp_efuse_utility.c
 CHIP_CSRCS += chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/cpu.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/esp_clk.c
+CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/hw_random.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/periph_ctrl.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/regi2c_ctrl.c
 CHIP_CSRCS += 
chip/$(ESP_HAL_3RDPARTY_UNPACK)/components/esp_hw_support/port/clk_tree_common.c
diff --git a/boards/risc-v/espressif/esp32c3-generic/configs/random/defconfig 
b/boards/risc-v/espressif/esp32c3-generic/configs/random/defconfig
new file mode 100644
index 0000000000..6e7aa75dbd
--- /dev/null
+++ b/boards/risc-v/espressif/esp32c3-generic/configs/random/defconfig
@@ -0,0 +1,47 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32c3-generic"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32C3_GENERIC=y
+CONFIG_ARCH_CHIP="espressif"
+CONFIG_ARCH_CHIP_ESPRESSIF=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_DEV_URANDOM=y
+CONFIG_DEV_ZERO=y
+CONFIG_EXAMPLES_RANDOM=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=3
+CONFIG_START_YEAR=2023
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/risc-v/espressif/esp32c6-generic/configs/random/defconfig 
b/boards/risc-v/espressif/esp32c6-generic/configs/random/defconfig
new file mode 100644
index 0000000000..f9853f9332
--- /dev/null
+++ b/boards/risc-v/espressif/esp32c6-generic/configs/random/defconfig
@@ -0,0 +1,48 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32c6-generic"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32C6_GENERIC=y
+CONFIG_ARCH_CHIP="espressif"
+CONFIG_ARCH_CHIP_ESPRESSIF=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_DEV_URANDOM=y
+CONFIG_DEV_ZERO=y
+CONFIG_ESPRESSIF_ESP32C6=y
+CONFIG_EXAMPLES_RANDOM=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=3
+CONFIG_START_YEAR=2023
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/risc-v/espressif/esp32h2-generic/configs/random/defconfig 
b/boards/risc-v/espressif/esp32h2-generic/configs/random/defconfig
new file mode 100644
index 0000000000..55b4548abc
--- /dev/null
+++ b/boards/risc-v/espressif/esp32h2-generic/configs/random/defconfig
@@ -0,0 +1,48 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32h2-generic"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32H2_GENERIC=y
+CONFIG_ARCH_CHIP="espressif"
+CONFIG_ARCH_CHIP_ESPRESSIF=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_DEV_URANDOM=y
+CONFIG_DEV_ZERO=y
+CONFIG_ESPRESSIF_ESP32H2=y
+CONFIG_EXAMPLES_RANDOM=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=3
+CONFIG_START_YEAR=2023
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y

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