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The following commit(s) were added to refs/heads/asf-site by this push:
new cc240d2f Publishing web: b5385572da9781727954ec9d98f5329c0d33acf2
docs: 242127556c27f336f394ab073ecc70ef010fbabd
cc240d2f is described below
commit cc240d2f632e9317e5f43f7cf51700b9480eab2f
Author: Brennan Ashton <[email protected]>
AuthorDate: Wed May 17 00:13:35 2023 +0000
Publishing web: b5385572da9781727954ec9d98f5329c0d33acf2 docs:
242127556c27f336f394ab073ecc70ef010fbabd
---
content/docs/10.0.0/index.html | 2 +-
content/docs/10.0.0/searchindex.js | 2 +-
content/docs/10.0.1/index.html | 2 +-
content/docs/10.0.1/searchindex.js | 2 +-
content/docs/10.1.0/index.html | 2 +-
content/docs/10.1.0/searchindex.js | 2 +-
content/docs/10.2.0/index.html | 2 +-
content/docs/10.2.0/searchindex.js | 2 +-
content/docs/10.3.0/index.html | 2 +-
content/docs/10.3.0/searchindex.js | 2 +-
content/docs/11.0.0/index.html | 2 +-
content/docs/11.0.0/searchindex.js | 2 +-
content/docs/12.0.0/index.html | 2 +-
content/docs/12.0.0/searchindex.js | 2 +-
content/docs/12.1.0/index.html | 2 +-
content/docs/12.1.0/searchindex.js | 2 +-
content/docs/latest/_images/NXOrganization.gif | Bin 34880 -> 0 bytes
content/docs/latest/_images/NXOrganization.png | Bin 0 -> 25180 bytes
content/docs/latest/_images/pinout.png | Bin 0 -> 699239 bytes
content/docs/latest/_images/pinout.webp | Bin 125938 -> 0 bytes
.../_sources/components/nxgraphics/index.rst.txt | 2 +-
.../_sources/guides/zerolatencyinterrupts.rst.txt | 249 +++++++++++++
.../arm/nrf52/boards/nrf52832-mdk/index.rst.txt | 2 +-
.../latest/_sources/reference/os/newreno.rst.txt | 172 +++++++++
.../docs/latest/components/nxgraphics/index.html | 2 +-
.../docs/latest/guides/zerolatencyinterrupts.html | 389 +++++++++++++++++++++
content/docs/latest/index.html | 2 +-
content/docs/latest/objects.inv | Bin 45758 -> 46207 bytes
.../arm/nrf52/boards/nrf52832-mdk/index.html | 2 +-
content/docs/latest/reference/os/newreno.html | 345 ++++++++++++++++++
content/docs/latest/searchindex.js | 2 +-
content/feed.xml | 4 +-
32 files changed, 1179 insertions(+), 24 deletions(-)
diff --git a/content/docs/10.0.0/index.html b/content/docs/10.0.0/index.html
index be62ea21..03f52558 100644
--- a/content/docs/10.0.0/index.html
+++ b/content/docs/10.0.0/index.html
@@ -133,7 +133,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 32-bit microcontroller
environments, the primary governing standards in NuttX are Posix and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:09</p>
+<p>Last Updated: 17 May 23 at 00:10</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/10.0.0/searchindex.js
b/content/docs/10.0.0/searchindex.js
index 402f523e..5413a095 100644
--- a/content/docs/10.0.0/searchindex.js
+++ b/content/docs/10.0.0/searchindex.js
@@ -1 +1 @@
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[...]
\ No newline at end of file
+Search.setIndex({docnames:["applications/index","boards/index","components/binfmt","components/drivers/block/index","components/drivers/character/analog","components/drivers/character/can","components/drivers/character/index","components/drivers/character/keypad","components/drivers/character/pwm","components/drivers/character/quadrature","components/drivers/character/rtc","components/drivers/character/serial","components/drivers/character/timer","components/drivers/character/touchscreen
[...]
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diff --git a/content/docs/10.0.1/index.html b/content/docs/10.0.1/index.html
index 2da67407..25978d08 100644
--- a/content/docs/10.0.1/index.html
+++ b/content/docs/10.0.1/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 32-bit microcontroller
environments, the primary governing standards in NuttX are Posix and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:09</p>
+<p>Last Updated: 17 May 23 at 00:11</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/10.0.1/searchindex.js
b/content/docs/10.0.1/searchindex.js
index 402f523e..3e9b5e5c 100644
--- a/content/docs/10.0.1/searchindex.js
+++ b/content/docs/10.0.1/searchindex.js
@@ -1 +1 @@
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[...]
\ No newline at end of file
+Search.setIndex({docnames:["applications/index","boards/index","components/binfmt","components/drivers/block/index","components/drivers/character/analog","components/drivers/character/can","components/drivers/character/index","components/drivers/character/keypad","components/drivers/character/pwm","components/drivers/character/quadrature","components/drivers/character/rtc","components/drivers/character/serial","components/drivers/character/timer","components/drivers/character/touchscreen
[...]
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diff --git a/content/docs/10.1.0/index.html b/content/docs/10.1.0/index.html
index 5d97e88a..0062ba7f 100644
--- a/content/docs/10.1.0/index.html
+++ b/content/docs/10.1.0/index.html
@@ -148,7 +148,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:09</p>
+<p>Last Updated: 17 May 23 at 00:11</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/10.1.0/searchindex.js
b/content/docs/10.1.0/searchindex.js
index 0f54fb4e..a2cdb6b6 100644
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[...]
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+Search.setIndex({docnames:["applications/index","applications/nsh/builtin","applications/nsh/commands","applications/nsh/config","applications/nsh/customizing","applications/nsh/index","applications/nsh/installation","applications/nsh/login","applications/nsh/nsh","components/binfmt","components/drivers/block/index","components/drivers/character/analog","components/drivers/character/can","components/drivers/character/foc","components/drivers/character/index","components/drivers/character
[...]
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diff --git a/content/docs/10.2.0/index.html b/content/docs/10.2.0/index.html
index c6dacfcc..88075d17 100644
--- a/content/docs/10.2.0/index.html
+++ b/content/docs/10.2.0/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:10</p>
+<p>Last Updated: 17 May 23 at 00:11</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/10.2.0/searchindex.js
b/content/docs/10.2.0/searchindex.js
index 12c2560a..b172d836 100644
--- a/content/docs/10.2.0/searchindex.js
+++ b/content/docs/10.2.0/searchindex.js
@@ -1 +1 @@
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[...]
\ No newline at end of file
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[...]
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diff --git a/content/docs/10.3.0/index.html b/content/docs/10.3.0/index.html
index c6dacfcc..88075d17 100644
--- a/content/docs/10.3.0/index.html
+++ b/content/docs/10.3.0/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:10</p>
+<p>Last Updated: 17 May 23 at 00:11</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/10.3.0/searchindex.js
b/content/docs/10.3.0/searchindex.js
index cb7bbaeb..fb491ded 100644
--- a/content/docs/10.3.0/searchindex.js
+++ b/content/docs/10.3.0/searchindex.js
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[...]
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+Search.setIndex({docnames:["applications/index","applications/nsh/builtin","applications/nsh/commands","applications/nsh/config","applications/nsh/customizing","applications/nsh/index","applications/nsh/installation","applications/nsh/login","applications/nsh/nsh","components/binfmt","components/drivers/block/index","components/drivers/character/analog","components/drivers/character/can","components/drivers/character/foc","components/drivers/character/index","components/drivers/character
[...]
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diff --git a/content/docs/11.0.0/index.html b/content/docs/11.0.0/index.html
index c6dacfcc..88075d17 100644
--- a/content/docs/11.0.0/index.html
+++ b/content/docs/11.0.0/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:10</p>
+<p>Last Updated: 17 May 23 at 00:11</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/11.0.0/searchindex.js
b/content/docs/11.0.0/searchindex.js
index be835ed2..0adbb4f1 100644
--- a/content/docs/11.0.0/searchindex.js
+++ b/content/docs/11.0.0/searchindex.js
@@ -1 +1 @@
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[...]
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+Search.setIndex({docnames:["applications/index","applications/nsh/builtin","applications/nsh/commands","applications/nsh/config","applications/nsh/customizing","applications/nsh/index","applications/nsh/installation","applications/nsh/login","applications/nsh/nsh","components/binfmt","components/drivers/block/index","components/drivers/character/analog","components/drivers/character/can","components/drivers/character/foc","components/drivers/character/index","components/drivers/character
[...]
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diff --git a/content/docs/12.0.0/index.html b/content/docs/12.0.0/index.html
index ab28e319..2729b89d 100644
--- a/content/docs/12.0.0/index.html
+++ b/content/docs/12.0.0/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:10</p>
+<p>Last Updated: 17 May 23 at 00:12</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/12.0.0/searchindex.js
b/content/docs/12.0.0/searchindex.js
index 7ff72bec..516a379f 100644
--- a/content/docs/12.0.0/searchindex.js
+++ b/content/docs/12.0.0/searchindex.js
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[...]
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[...]
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diff --git a/content/docs/12.1.0/index.html b/content/docs/12.1.0/index.html
index e69f27d7..5b73f52c 100644
--- a/content/docs/12.1.0/index.html
+++ b/content/docs/12.1.0/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:11</p>
+<p>Last Updated: 17 May 23 at 00:12</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/12.1.0/searchindex.js
b/content/docs/12.1.0/searchindex.js
index 80c7992b..b9508ed4 100644
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+++ b/content/docs/12.1.0/searchindex.js
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[...]
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diff --git a/content/docs/latest/_images/NXOrganization.gif
b/content/docs/latest/_images/NXOrganization.gif
deleted file mode 100644
index 6bae8e55..00000000
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differ
diff --git a/content/docs/latest/_images/NXOrganization.png
b/content/docs/latest/_images/NXOrganization.png
new file mode 100644
index 00000000..37f9c1ab
Binary files /dev/null and b/content/docs/latest/_images/NXOrganization.png
differ
diff --git a/content/docs/latest/_images/pinout.png
b/content/docs/latest/_images/pinout.png
new file mode 100644
index 00000000..9ee05cfb
Binary files /dev/null and b/content/docs/latest/_images/pinout.png differ
diff --git a/content/docs/latest/_images/pinout.webp
b/content/docs/latest/_images/pinout.webp
deleted file mode 100644
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diff --git a/content/docs/latest/_sources/components/nxgraphics/index.rst.txt
b/content/docs/latest/_sources/components/nxgraphics/index.rst.txt
index 7c0614be..f5740a45 100644
--- a/content/docs/latest/_sources/components/nxgraphics/index.rst.txt
+++ b/content/docs/latest/_sources/components/nxgraphics/index.rst.txt
@@ -83,7 +83,7 @@ That NuttX directory organization is discussed in `Appendix
B <#grapicsdirs>`__ of this document. The logic modules are discussed in
the following sub-paragraphs.
-.. figure:: NXOrganization.gif
+.. figure:: NXOrganization.png
:align: center
NX Graphics Library (``NXGL``)
diff --git a/content/docs/latest/_sources/guides/zerolatencyinterrupts.rst.txt
b/content/docs/latest/_sources/guides/zerolatencyinterrupts.rst.txt
new file mode 100644
index 00000000..f51eac70
--- /dev/null
+++ b/content/docs/latest/_sources/guides/zerolatencyinterrupts.rst.txt
@@ -0,0 +1,249 @@
+=========================================
+High Performance, Zero Latency Interrupts
+=========================================
+
+Generic Interrupt Handling
+==========================
+
+NuttX includes a generic interrupt handling subsystem that makes it
+convenient to deal with interrupts using only IRQ numbers. In order to
+integrate with this generic interrupt handling system, the platform
+specific code is expected to collect all thread state into an container,
+``struct xcptcontext``. This container represents the full state of the
+thread and can be saved, restored, and exchanged as a *unit of thread*.
+
+While this state saving has many useful benefits, it does require
+processing time. It was reported to me that this state saving required
+about two microseconds on an STM32F4Discovery board. That added
+interrupt latency might be an issue in some circumstance.
+
+**Terminology:** The concepts discussed in this Wiki are not unique to
+NuttX. Other RTOS have similar concepts but will use different
+terminology. The `Nucleus
<https://www.embedded.com/design/operating-systems/4461604/Interrupts-in-the-Nucleus-SE-RTOS>`_
+RTOS, for example use the terms *Native* and *Managed* interrupts.
+
+Bypassing the Generic Interrupt Handling
+========================================
+
+Most modern MCUs (such as the ARM Cortex-M family) receive and dispatch
+interrupts through a *vector table*. The vector table is a table in
+memory. Each entry in the table holds the address of an interrupt
+handler corresponding to different interrupts. When the interrupt
+occurs, the hardware fetches the corresponding interrupt handler address
+and gives control to the interrupt handler.
+
+In the implementation of the generic interrupt handler, these vectored
+interrupts are not used as intended by the hardware designer. Rather,
+they are used to obtain an IRQ number and then to transfer control to
+the common, generic interrupt handling logic.
+
+One way to achieve higher performance interrupts and still retain the
+benefits of the generic interrupt handling logic is to simply replace an
+interrupt handler address in the vector table with a different interrupt
+handler; one that does not vector to the generic interrupt handling
+logic logic, but rather to your custom code.
+
+Often, the vector table is in ROM. So you can hard-code a special
+interrupt vector by modifying the ROM vector table so that the specific
+entry points to your custom interrupt handler. Or, if the architecture
+permits, you can use a vector table in RAM. Then you can freely attach
+and detach custom vector handlers by writing directly to the vector
+table. The ARM Cortex-M port provides interfaces to support this mode
+when the ``CONFIG_ARCH_RAMVECTORS`` option is enabled.
+
+So what is the downside? There are two:
+
+ - Your custom interrupt handler will not have collected its state
+ into the ``struct xcptcontext`` container. Therefore, it cannot
+ communicate with operating system. Your custom interrupt handler
+ has been taken "out of the game" and can no longer work with the
+ system.
+
+ - If your custom interrupt is truly going to be *high performance*
+ then you will also have to support nested interrupts! The custom
+ interrupt must have a high priority and must be able interrupt the
+ generic interrupt handling logic. Otherwise, it will be
+ occasionally delayed when there is a collision between your custom
+ interrupt and other, lower priority interrupts.
+
+Getting Back into the Game
+==========================
+
+As mentioned, the custom interrupt handler can not use most of the
+service of the OS since it has not created a ``struct xcptcontext``
+container. So it needs a mechanism to "get back into the game" when it
+needs to interact with the operating system to, for example, post a
+semaphore, signal a thread, or send a message.
+
+The ARM Cortex-M family supports a special way to do this using the
+*PendSV* interrupt:
+
+ - The custom logic would connect with the *PendSV* interrupt using
+ the standard ``irq_attach()`` interface.
+
+ - In the custom interrupt handler, it would schedule the *PendSV*
+ interrupt when it needs to communicate with the OS.
+
+ - The *PendSV* interrupt is dispatched through generic interrupt
+ system so when the attached *PendSV* interrupt is handled, it
+ will be in a context where it can perform any necessary OS
+ interactions.
+
+With the ARMv7_M architecture, the *PendSV* interrupt can be generated
+with:
+
+.. code-block:: c
+
+ up_trigger_irq(NVIC_IRQ_PENDSV);
+
+On other architectures, it may be possible to do something like a
+software interrupt from the custom interrupt handler to accomplish the
+same thing.
+
+The custom logic would be needed to communicate the events of interest
+between the high priority interrupt handler and *PendSV* interrupt
+handler. A detailed discussion of that custom logic is beyond the
+scope of this Wiki page.
+
+Nested Interrupt Handling
+=========================
+
+Some general notes about nested interrupt handling are provided in
+another `Wiki page
<https://cwiki.apache.org/confluence/display/NUTTX/Nested+Interrupts>`_.
+In this case, handling the nested custom interrupt is simpler because
+the generic interrupt handler is not re-entered. Rather, the generic
+interrupt handler must simply be made to co-exist with the custom
+interrupt interrupt handler.
+
+Modifications may be required to the generic interrupt handling logic
+to accomplish. A few points need to be made here:
+
+ - The MCU should support interrupt prioritization so that the custom
+ interrupt can be scheduled with a higher priority.
+
+ - The generic interrupt handlers currently disable interrupts during
+ interrupts. Instead, they must be able to keep the custom
+ interrupt enabled throughout interrupt process but still prevent
+ re-entrancy by other standard interrupts (This can be done by
+ setting an interrupt base priority level in the Cortex-M family).
+
+ - The custom interrupt handler can now interrupt the generic
+ interrupt handler at any place. Is the logic safe in all cases to
+ be interrupted? Sometimes interrupt handlers place the MCU in
+ momentarily perverse states while registers are being
+ manipulated. Make sure that it is safe to take interrupts at any
+ time (or else keep the interrupts disabled in the critical
+ times).
+
+ - Will the custom interrupt handler have all of the resources it
+ needs in place when it occurs? Will it have a valid stack
+ pointer? (In the Cortex-M implementation, for example, the MSP
+ may not be valid when the custom interrupt handler is entered).
+
+Some of these issues are complex and so you should expect some
+complexity in getting the nested interrupt handler to work.
+
+Cortex-M3/4 Implementation
+==========================
+
+Such high priority, nested interrupt handler has been implemented for
+the Cortex-M3/4 families.
+
+The following paragraphs will summarize that implementation.
+
+Configuration Options
+---------------------
+
+``CONFIG_ARCH_HIPRI_INTERRUPT``
+
+If ``CONFIG_ARMV7M_USEBASEPRI`` is selected, then interrupts will be
+disabled by setting the *BASEPRI* register to
+``NVIC_SYSH_DISABLE_PRIORITY`` so that most interrupts will not have
+execution priority. *SVCall* must have execution priority in all
+cases.
+
+In the normal cases, interrupts are not nest-able and all interrupts
+run at an execution priority between ``NVIC_SYSH_PRIORITY_MIN`` and
+``NVIC_SYSH_PRIORITY_MAX`` (with ``NVIC_SYSH_PRIORITY_MAX`` reserved
+for *SVCall*).
+
+If, in addition, ``CONFIG_ARCH_HIPRI_INTERRUPT`` is defined, then
+special high priority interrupts are supported. These are not "nested"
+in the normal sense of the word. These high priority interrupts can
+interrupt normal processing but execute outside of OS (although they
+can "get back into the game" via a *PendSV* interrupt).
+
+Disabling the High Priority Interrupt
+-------------------------------------
+
+In the normal course of things, interrupts must occasionally be
+disabled using the ``up_irq_save()`` inline function to prevent
+contention in use of resources that may be shared between interrupt
+level and non-interrupt level logic. Now the question arises, if we
+are using the *BASEPRI* to disable interrupts and have high priority
+interrupts enabled (``CONFIG_ARCH_HIPRI_INTERRUPT=y``), do we disable
+all interrupts except *SVCall* (we cannot disable *SVCall*
+interrupts)? Or do we only disable the "normal" interrupts?
+
+If we are using the *BASEPRI* register to disable interrupts, then the
+answer is that we must disable *ONLY* the normal interrupts. That is
+because we cannot disable *SVCall* interrupts and we cannot permit
+*SVCall* interrupts running at a higher priority than the high
+priority interrupts. Otherwise, they will introduce jitter in the high
+priority interrupt response time.
+
+Hence, if you need to disable the high priority interrupt, you will
+have to disable the interrupt either at the peripheral that generates
+the interrupt or at the interrupt controller, the *NVIC*. Disabling
+global interrupts via the *BASEPRI* register cannot affect high
+priority interrupts.
+
+Dependencies
+------------
+
+ - ``CONFIG_ARCH_HAVE_IRQPRIO``. Support for prioritized interrupt
+ support must be enabled.
+
+ - Floating Point Registers. If used with a Cortex-M4 that supports
+ hardware floating point, you cannot use hardware floating point
+ in the high priority interrupt handler UNLESS you use the common
+ vector logic that supports saving of floating point registers on
+ all interrupts.
+
+Configuring High Priority Interrupts
+------------------------------------
+
+How do you specify a high priority interrupt? You need to do two
+things:
+
+First, You need to change the address in the vector table so that the
+high priority interrupt vectors to your special C interrupt handler.
+There are two ways to do this:
+
+ - If you select ``CONFIG_ARCH_RAMVECTORS``, then vectors will be
+ kept in RAM and the system will support the interface: ``int
+ up_ramvec_attach(int irq, up_vector_t vector)``. That interface
+ can be used to attach your C interrupt handler to the vector at
+ run time.
+
+ - Alternatively, you could keep your vectors in FLASH but in order
+ to this, you would have to develop your own custom vector table.
+
+Second, you need to set the priority of your interrupt to *NVIC* to
+``NVIC_SYSH_HIGH_PRIORITY`` using the standard interface:
+``int up_prioritize_irq(int irq, int priority);``
+
+Example Code
+------------
+
+You can find an example that tests the high priority, nested interrupts in the
NuttX source:
+
+ - nuttx/boards/arm/stm32/viewtool-stm32f107/README.txt. Description
+ of the configuration
+
+ - nuttx/boards/arm/stm32/viewtool-stm32f107/highpri. Test
+ configuration
+
+ - nuttx/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri. Test
+ driver.
+
diff --git
a/content/docs/latest/_sources/platforms/arm/nrf52/boards/nrf52832-mdk/index.rst.txt
b/content/docs/latest/_sources/platforms/arm/nrf52/boards/nrf52832-mdk/index.rst.txt
index 388f81ab..17fd92a2 100644
---
a/content/docs/latest/_sources/platforms/arm/nrf52/boards/nrf52832-mdk/index.rst.txt
+++
b/content/docs/latest/_sources/platforms/arm/nrf52/boards/nrf52832-mdk/index.rst.txt
@@ -7,7 +7,7 @@ the nRF52832 SoC from Nordic. It features 24 I/Os an on-board
RGB led and a chip
It also includes an embedded DAPlink debugger which allows to flash/debug and
monitor UART
from the USB port.
-.. figure:: pinout.webp
+.. figure:: pinout.png
:align: center
Pinout diagram
diff --git a/content/docs/latest/_sources/reference/os/newreno.rst.txt
b/content/docs/latest/_sources/reference/os/newreno.rst.txt
new file mode 100644
index 00000000..7f238e5a
--- /dev/null
+++ b/content/docs/latest/_sources/reference/os/newreno.rst.txt
@@ -0,0 +1,172 @@
+==========================
+Congestion Control NewReno
+==========================
+
+NewReno congestion control algorithm is used to solve the problem of network
congestion breakdown, which includes:
+ - Slow Start
+ - Congestion Avoidance
+ - Fast Retransmission
+ - Fast Recovery.
+
+ The implementation refers to RFC6582 and RFC5681. In addition, we optimize
the congestion algorithm. In the congestion avoidance state, the maximum
congestion window (max_cwnd) is used to limit the excessive growth of cwnd and
prevent network jitter caused by congestion. Maximum congestion window
(max_cwnd) is updated with the current congestion window (cwnd) and the update
weight is 0.875 when an RTO timeout occurs.
+
+Workflow
+========
+
+
+The NewReno on the tcp sender adjusts the cwnd and ssthresh based on received
ack and Retransmitted Timeout (RTO) events.
+
+Using the cwnd, together with snd_wnd, controls the number of bytes sent to
the network. Here's how newreno works, as following:
+
+- Initialize the ssthresh and cwnd, on establishing the tcp connection.
+- When the ack is received, check whether the ack is repeated.
+
+ + If yes, increase the dupack counts. If the dupack exceeds the Fast
Retransmission Threshold 3, after retransmitting the lost segments (Fast
Retransmission), enter to the Fast Recovery state.
+ + If no, receive the new ack.
+
+ * If the current ackno is bigger than fr_ack which is the snd_seq when Fast
Retransmission ocurrs, exit the Fast Recovery state and enter to congestion
avoidance.
+ * If the cwnd is less than ssthresh, increase the cwnd on slow start state.
+ * If the cwnd is greater than or equal to ssthresh, the increased cwnd can
not exceed max_cwnd.
+
+- when RTO times out, reset the values of cwnd and ssthresh, update the
max_cwnd, and enter to Slow Start state.
+- When sending a segment, the minimum value of cwnd and snd_wnd is used to
calculate the number of bytes that can be sent.
+
+The simple state transition diagram of the NewReno is shown below.
+
+::
+
+ | ^
+ | ------------------------
+ | initialize cwnd ssthresh
+ V
+ +------------+
+ .--------------->| Slow Start |-----------------.
+ | +------------+ |
+ | | | |
+ | timeout | | recv dup ack | recv new ack
+ |------------------ | | --------------- | ----------------
+ |reset cwnd ssthresh | | dupack >= 3 | cwnd >= ssthresh
+ |update max_cwnd | | fr_ack = snd_seq |
+ |<--------------------' |<------------------. |
+ | | | |
+ | v | V
+ | +--------+ +--------------------+
+ | | FT | |Congestion Avoidance|
+ | +--------+ +--------------------+
+ | | ^ |
+ | retransmit|lost segment | |
+ | | | |
+ | | recv new ack | |
+ | v ------------ | |
+ | +--------+ ack > fr_ack | |
+ | | FR |--------------' |
+ | +--------+ |
+ | | |
+ | v v
+ '-----------------------------------------------'
+
+Configuration Options
+=====================
+``NET_TCP_CC_NEWRENO``
+ Enable or disable NewRenofunction.
+
+ Depends on ``NET_TCP_FAST_RETRANSMIT``.
+
+Test
+====
+
+
+Test topology
+-------------
+
+::
+
+ IP:10.0.1.1
+
+ +--------+
+ --------| nuttx0 |--------
+ | +--------+ |
+ | /|\ |
+ | | |
+ | +-------+ |
+ | | ifb0 | |
+ | +-------+ |
+ \|/ /|\ \|/
+ +-------+ | +-------+
+ | tap0 |------/ \-------| tap1 |
+ +-------+ +-------+
+ /|\ /|\
+ | |
+ \|/ \|/
+ +-------+ +-------+
+ sim1 | eth0 | | eth0 | sim2
+ +-------+ +-------+
+
+ IP:10.0.1.3 IP:10.0.1.4
+
+Test steps
+----------
+
+Test the function on the Ubuntu 22.04 x86_64 with NuttX SIM by following steps:
+
+:1.Configure the test environment:
+
+- Set the nuttx0 inbound speed to 10Mbps.
+
+ .. code-block:: bash
+
+ # Load fib module, and start ifb0 interface
+ modprobe ifb
+ ip link set dev ifb0 up
+
+ # Import the nuttx0 ingress packets into ifb0
+ tc qdisc add dev nuttx0 handle ffff: ingress
+ tc filter add dev nuttx0 parent ffff: u32 match u32 0 0 action mirred
egress redirect dev ifb0
+
+ # Limit nuttx0 ingress 10Mbps
+ tc qdisc add dev ifb0 root tbf rate 10Mbit latency 50ms burst 1540
+
+- configure the sim simulator.
+
+ + Start iperf3 server on ubuntu.
+
+ .. code-block:: bash
+
+ iperf3 -s -i1 -p10003 #for sim1
+ iperf3 -s -i1 -p10004 #for sim2
+
+
+ + start the emulators sim1 and sim2 and configure ip addresses.
+
+ .. code-block:: bash
+
+ # start and configure sim1
+ start gdb nuttx
+ ifconfig eth0 10.0.1.3
+
+ # start and configure sim2
+ start gdb nuttx
+ ifconfig eth0 10.0.1.4 # sim2
+
+
+:2.Stream Testing:
+
+
+- Use iperf3 to perform the stream testing.
+
+ .. code-block:: bash
+
+ iperf3 -c 10.0.1.1 -i1 -t60 -p10003 # sim1
+
+ iperf3 -c 10.0.1.1 -i1 -t60 -p10004 # sim2
+
+
+:3.Comparison Testing:
+
+ Compares the test results of enabling and disabling NewReno.
+
+
+Test results
+------------
+
+ The test results should indicate that the total network throughput was
significantly increased when NewReno congestion control was enabled, which was
close to the actual total network bandwidth, and the rates of both sim devices
were stable.
diff --git a/content/docs/latest/components/nxgraphics/index.html
b/content/docs/latest/components/nxgraphics/index.html
index 0d2603d2..7c09eecd 100644
--- a/content/docs/latest/components/nxgraphics/index.html
+++ b/content/docs/latest/components/nxgraphics/index.html
@@ -250,7 +250,7 @@ That NuttX directory organization is discussed in <a
class="reference external"
B</a> of this document. The logic modules are discussed in
the following sub-paragraphs.</p>
<figure class="align-center">
-<img alt="../../_images/NXOrganization.gif"
src="../../_images/NXOrganization.gif" />
+<img alt="../../_images/NXOrganization.png"
src="../../_images/NXOrganization.png" />
</figure>
<section id="nx-graphics-library-nxgl">
<h3>NX Graphics Library (<code class="docutils literal notranslate"><span
class="pre">NXGL</span></code>)<a class="headerlink"
href="#nx-graphics-library-nxgl" title="Permalink to this headline"></a></h3>
diff --git a/content/docs/latest/guides/zerolatencyinterrupts.html
b/content/docs/latest/guides/zerolatencyinterrupts.html
new file mode 100644
index 00000000..c738d7b1
--- /dev/null
+++ b/content/docs/latest/guides/zerolatencyinterrupts.html
@@ -0,0 +1,389 @@
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+ Documentation/_templates/layout.html
+
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+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
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+ <section id="high-performance-zero-latency-interrupts">
+<h1>High Performance, Zero Latency Interrupts<a class="headerlink"
href="#high-performance-zero-latency-interrupts" title="Permalink to this
headline"></a></h1>
+<section id="generic-interrupt-handling">
+<h2>Generic Interrupt Handling<a class="headerlink"
href="#generic-interrupt-handling" title="Permalink to this headline"></a></h2>
+<p>NuttX includes a generic interrupt handling subsystem that makes it
+convenient to deal with interrupts using only IRQ numbers. In order to
+integrate with this generic interrupt handling system, the platform
+specific code is expected to collect all thread state into an container,
+<code class="docutils literal notranslate"><span class="pre">struct</span>
<span class="pre">xcptcontext</span></code>. This container represents the full
state of the
+thread and can be saved, restored, and exchanged as a <em>unit of
thread</em>.</p>
+<p>While this state saving has many useful benefits, it does require
+processing time. It was reported to me that this state saving required
+about two microseconds on an STM32F4Discovery board. That added
+interrupt latency might be an issue in some circumstance.</p>
+<p><strong>Terminology:</strong> The concepts discussed in this Wiki are not
unique to
+NuttX. Other RTOS have similar concepts but will use different
+terminology. The <a class="reference external"
href="https://www.embedded.com/design/operating-systems/4461604/Interrupts-in-the-Nucleus-SE-RTOS";>Nucleus</a>
+RTOS, for example use the terms <em>Native</em> and <em>Managed</em>
interrupts.</p>
+</section>
+<section id="bypassing-the-generic-interrupt-handling">
+<h2>Bypassing the Generic Interrupt Handling<a class="headerlink"
href="#bypassing-the-generic-interrupt-handling" title="Permalink to this
headline"></a></h2>
+<p>Most modern MCUs (such as the ARM Cortex-M family) receive and dispatch
+interrupts through a <em>vector table</em>. The vector table is a table in
+memory. Each entry in the table holds the address of an interrupt
+handler corresponding to different interrupts. When the interrupt
+occurs, the hardware fetches the corresponding interrupt handler address
+and gives control to the interrupt handler.</p>
+<p>In the implementation of the generic interrupt handler, these vectored
+interrupts are not used as intended by the hardware designer. Rather,
+they are used to obtain an IRQ number and then to transfer control to
+the common, generic interrupt handling logic.</p>
+<p>One way to achieve higher performance interrupts and still retain the
+benefits of the generic interrupt handling logic is to simply replace an
+interrupt handler address in the vector table with a different interrupt
+handler; one that does not vector to the generic interrupt handling
+logic logic, but rather to your custom code.</p>
+<p>Often, the vector table is in ROM. So you can hard-code a special
+interrupt vector by modifying the ROM vector table so that the specific
+entry points to your custom interrupt handler. Or, if the architecture
+permits, you can use a vector table in RAM. Then you can freely attach
+and detach custom vector handlers by writing directly to the vector
+table. The ARM Cortex-M port provides interfaces to support this mode
+when the <code class="docutils literal notranslate"><span
class="pre">CONFIG_ARCH_RAMVECTORS</span></code> option is enabled.</p>
+<p>So what is the downside? There are two:</p>
+<blockquote>
+<div><ul class="simple">
+<li><p>Your custom interrupt handler will not have collected its state
+into the <code class="docutils literal notranslate"><span
class="pre">struct</span> <span class="pre">xcptcontext</span></code>
container. Therefore, it cannot
+communicate with operating system. Your custom interrupt handler
+has been taken “out of the game” and can no longer work with the
+system.</p></li>
+<li><p>If your custom interrupt is truly going to be <em>high performance</em>
+then you will also have to support nested interrupts! The custom
+interrupt must have a high priority and must be able interrupt the
+generic interrupt handling logic. Otherwise, it will be
+occasionally delayed when there is a collision between your custom
+interrupt and other, lower priority interrupts.</p></li>
+</ul>
+</div></blockquote>
+</section>
+<section id="getting-back-into-the-game">
+<h2>Getting Back into the Game<a class="headerlink"
href="#getting-back-into-the-game" title="Permalink to this headline"></a></h2>
+<p>As mentioned, the custom interrupt handler can not use most of the
+service of the OS since it has not created a <code class="docutils literal
notranslate"><span class="pre">struct</span> <span
class="pre">xcptcontext</span></code>
+container. So it needs a mechanism to “get back into the game” when it
+needs to interact with the operating system to, for example, post a
+semaphore, signal a thread, or send a message.</p>
+<p>The ARM Cortex-M family supports a special way to do this using the
+<em>PendSV</em> interrupt:</p>
+<blockquote>
+<div><ul class="simple">
+<li><p>The custom logic would connect with the <em>PendSV</em> interrupt using
+the standard <code class="docutils literal notranslate"><span
class="pre">irq_attach()</span></code> interface.</p></li>
+<li><p>In the custom interrupt handler, it would schedule the <em>PendSV</em>
+interrupt when it needs to communicate with the OS.</p></li>
+<li><p>The <em>PendSV</em> interrupt is dispatched through generic interrupt
+system so when the attached <em>PendSV</em> interrupt is handled, it
+will be in a context where it can perform any necessary OS
+interactions.</p></li>
+</ul>
+</div></blockquote>
+<p>With the ARMv7_M architecture, the <em>PendSV</em> interrupt can be
generated
+with:</p>
+<div class="highlight-c notranslate"><div
class="highlight"><pre><span></span><span class="n">up_trigger_irq</span><span
class="p">(</span><span class="n">NVIC_IRQ_PENDSV</span><span
class="p">);</span><span class="w"></span>
+</pre></div>
+</div>
+<p>On other architectures, it may be possible to do something like a
+software interrupt from the custom interrupt handler to accomplish the
+same thing.</p>
+<p>The custom logic would be needed to communicate the events of interest
+between the high priority interrupt handler and <em>PendSV</em> interrupt
+handler. A detailed discussion of that custom logic is beyond the
+scope of this Wiki page.</p>
+</section>
+<section id="nested-interrupt-handling">
+<h2>Nested Interrupt Handling<a class="headerlink"
href="#nested-interrupt-handling" title="Permalink to this headline"></a></h2>
+<p>Some general notes about nested interrupt handling are provided in
+another <a class="reference external"
href="https://cwiki.apache.org/confluence/display/NUTTX/Nested+Interrupts";>Wiki
page</a>.
+In this case, handling the nested custom interrupt is simpler because
+the generic interrupt handler is not re-entered. Rather, the generic
+interrupt handler must simply be made to co-exist with the custom
+interrupt interrupt handler.</p>
+<p>Modifications may be required to the generic interrupt handling logic
+to accomplish. A few points need to be made here:</p>
+<blockquote>
+<div><ul class="simple">
+<li><p>The MCU should support interrupt prioritization so that the custom
+interrupt can be scheduled with a higher priority.</p></li>
+<li><p>The generic interrupt handlers currently disable interrupts during
+interrupts. Instead, they must be able to keep the custom
+interrupt enabled throughout interrupt process but still prevent
+re-entrancy by other standard interrupts (This can be done by
+setting an interrupt base priority level in the Cortex-M family).</p></li>
+<li><p>The custom interrupt handler can now interrupt the generic
+interrupt handler at any place. Is the logic safe in all cases to
+be interrupted? Sometimes interrupt handlers place the MCU in
+momentarily perverse states while registers are being
+manipulated. Make sure that it is safe to take interrupts at any
+time (or else keep the interrupts disabled in the critical
+times).</p></li>
+<li><p>Will the custom interrupt handler have all of the resources it
+needs in place when it occurs? Will it have a valid stack
+pointer? (In the Cortex-M implementation, for example, the MSP
+may not be valid when the custom interrupt handler is entered).</p></li>
+</ul>
+</div></blockquote>
+<p>Some of these issues are complex and so you should expect some
+complexity in getting the nested interrupt handler to work.</p>
+</section>
+<section id="cortex-m3-4-implementation">
+<h2>Cortex-M3/4 Implementation<a class="headerlink"
href="#cortex-m3-4-implementation" title="Permalink to this headline"></a></h2>
+<p>Such high priority, nested interrupt handler has been implemented for
+the Cortex-M3/4 families.</p>
+<p>The following paragraphs will summarize that implementation.</p>
+<section id="configuration-options">
+<h3>Configuration Options<a class="headerlink" href="#configuration-options"
title="Permalink to this headline"></a></h3>
+<p><code class="docutils literal notranslate"><span
class="pre">CONFIG_ARCH_HIPRI_INTERRUPT</span></code></p>
+<p>If <code class="docutils literal notranslate"><span
class="pre">CONFIG_ARMV7M_USEBASEPRI</span></code> is selected, then interrupts
will be
+disabled by setting the <em>BASEPRI</em> register to
+<code class="docutils literal notranslate"><span
class="pre">NVIC_SYSH_DISABLE_PRIORITY</span></code> so that most interrupts
will not have
+execution priority. <em>SVCall</em> must have execution priority in all
+cases.</p>
+<p>In the normal cases, interrupts are not nest-able and all interrupts
+run at an execution priority between <code class="docutils literal
notranslate"><span class="pre">NVIC_SYSH_PRIORITY_MIN</span></code> and
+<code class="docutils literal notranslate"><span
class="pre">NVIC_SYSH_PRIORITY_MAX</span></code> (with <code class="docutils
literal notranslate"><span class="pre">NVIC_SYSH_PRIORITY_MAX</span></code>
reserved
+for <em>SVCall</em>).</p>
+<p>If, in addition, <code class="docutils literal notranslate"><span
class="pre">CONFIG_ARCH_HIPRI_INTERRUPT</span></code> is defined, then
+special high priority interrupts are supported. These are not “nested”
+in the normal sense of the word. These high priority interrupts can
+interrupt normal processing but execute outside of OS (although they
+can “get back into the game” via a <em>PendSV</em> interrupt).</p>
+</section>
+<section id="disabling-the-high-priority-interrupt">
+<h3>Disabling the High Priority Interrupt<a class="headerlink"
href="#disabling-the-high-priority-interrupt" title="Permalink to this
headline"></a></h3>
+<p>In the normal course of things, interrupts must occasionally be
+disabled using the <code class="docutils literal notranslate"><span
class="pre">up_irq_save()</span></code> inline function to prevent
+contention in use of resources that may be shared between interrupt
+level and non-interrupt level logic. Now the question arises, if we
+are using the <em>BASEPRI</em> to disable interrupts and have high priority
+interrupts enabled (<code class="docutils literal notranslate"><span
class="pre">CONFIG_ARCH_HIPRI_INTERRUPT=y</span></code>), do we disable
+all interrupts except <em>SVCall</em> (we cannot disable <em>SVCall</em>
+interrupts)? Or do we only disable the “normal” interrupts?</p>
+<p>If we are using the <em>BASEPRI</em> register to disable interrupts, then
the
+answer is that we must disable <em>ONLY</em> the normal interrupts. That is
+because we cannot disable <em>SVCall</em> interrupts and we cannot permit
+<em>SVCall</em> interrupts running at a higher priority than the high
+priority interrupts. Otherwise, they will introduce jitter in the high
+priority interrupt response time.</p>
+<p>Hence, if you need to disable the high priority interrupt, you will
+have to disable the interrupt either at the peripheral that generates
+the interrupt or at the interrupt controller, the <em>NVIC</em>. Disabling
+global interrupts via the <em>BASEPRI</em> register cannot affect high
+priority interrupts.</p>
+</section>
+<section id="dependencies">
+<h3>Dependencies<a class="headerlink" href="#dependencies" title="Permalink to
this headline"></a></h3>
+<blockquote>
+<div><ul class="simple">
+<li><p><code class="docutils literal notranslate"><span
class="pre">CONFIG_ARCH_HAVE_IRQPRIO</span></code>. Support for prioritized
interrupt
+support must be enabled.</p></li>
+<li><p>Floating Point Registers. If used with a Cortex-M4 that supports
+hardware floating point, you cannot use hardware floating point
+in the high priority interrupt handler UNLESS you use the common
+vector logic that supports saving of floating point registers on
+all interrupts.</p></li>
+</ul>
+</div></blockquote>
+</section>
+<section id="configuring-high-priority-interrupts">
+<h3>Configuring High Priority Interrupts<a class="headerlink"
href="#configuring-high-priority-interrupts" title="Permalink to this
headline"></a></h3>
+<p>How do you specify a high priority interrupt? You need to do two
+things:</p>
+<p>First, You need to change the address in the vector table so that the
+high priority interrupt vectors to your special C interrupt handler.
+There are two ways to do this:</p>
+<blockquote>
+<div><ul class="simple">
+<li><p>If you select <code class="docutils literal notranslate"><span
class="pre">CONFIG_ARCH_RAMVECTORS</span></code>, then vectors will be
+kept in RAM and the system will support the interface: <code class="docutils
literal notranslate"><span class="pre">int</span>
+<span class="pre">up_ramvec_attach(int</span> <span class="pre">irq,</span>
<span class="pre">up_vector_t</span> <span class="pre">vector)</span></code>.
That interface
+can be used to attach your C interrupt handler to the vector at
+run time.</p></li>
+<li><p>Alternatively, you could keep your vectors in FLASH but in order
+to this, you would have to develop your own custom vector table.</p></li>
+</ul>
+</div></blockquote>
+<p>Second, you need to set the priority of your interrupt to <em>NVIC</em> to
+<code class="docutils literal notranslate"><span
class="pre">NVIC_SYSH_HIGH_PRIORITY</span></code> using the standard interface:
+<code class="docutils literal notranslate"><span class="pre">int</span> <span
class="pre">up_prioritize_irq(int</span> <span class="pre">irq,</span> <span
class="pre">int</span> <span class="pre">priority);</span></code></p>
+</section>
+<section id="example-code">
+<h3>Example Code<a class="headerlink" href="#example-code" title="Permalink to
this headline"></a></h3>
+<p>You can find an example that tests the high priority, nested interrupts in
the NuttX source:</p>
+<blockquote>
+<div><ul class="simple">
+<li><p>nuttx/boards/arm/stm32/viewtool-stm32f107/README.txt. Description
+of the configuration</p></li>
+<li><p>nuttx/boards/arm/stm32/viewtool-stm32f107/highpri. Test
+configuration</p></li>
+<li><p>nuttx/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri. Test
+driver.</p></li>
+</ul>
+</div></blockquote>
+</section>
+</section>
+</section>
+
+
+ </div>
+ </div>
+ <footer>
+
+ <hr/>
+
+ <div role="contentinfo">
+ <p>© Copyright 2020, The Apache Software Foundation.</p>
+ </div>
+
+
+
+</footer>
+ </div>
+ </div>
+ </section>
+ </div>
+ <script>
+ jQuery(function () {
+ SphinxRtdTheme.Navigation.enable(true);
+ });
+ </script>
+
+</body>
+</html>
\ No newline at end of file
diff --git a/content/docs/latest/index.html b/content/docs/latest/index.html
index cc64fa76..63be5a23 100644
--- a/content/docs/latest/index.html
+++ b/content/docs/latest/index.html
@@ -149,7 +149,7 @@ by following these <a class="reference internal"
href="contributing/documentatio
<section id="nuttx-documentation">
<h1>NuttX Documentation<a class="headerlink" href="#nuttx-documentation"
title="Permalink to this headline"></a></h1>
<p>NuttX is a real-time operating system (RTOS) with an emphasis on standards
compliance and small footprint. Scalable from 8-bit to 64-bit microcontroller
environments, the primary governing standards in NuttX are POSIX and ANSI
standards. Additional standard APIs from Unix and other common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
-<p>Last Updated: 16 May 23 at 00:11</p>
+<p>Last Updated: 17 May 23 at 00:12</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/latest/objects.inv b/content/docs/latest/objects.inv
index d073e3c8..f7adbb30 100644
Binary files a/content/docs/latest/objects.inv and
b/content/docs/latest/objects.inv differ
diff --git
a/content/docs/latest/platforms/arm/nrf52/boards/nrf52832-mdk/index.html
b/content/docs/latest/platforms/arm/nrf52/boards/nrf52832-mdk/index.html
index 2fa7f0d0..58d3a107 100644
--- a/content/docs/latest/platforms/arm/nrf52/boards/nrf52832-mdk/index.html
+++ b/content/docs/latest/platforms/arm/nrf52/boards/nrf52832-mdk/index.html
@@ -175,7 +175,7 @@ the nRF52832 SoC from Nordic. It features 24 I/Os an
on-board RGB led and a chip
It also includes an embedded DAPlink debugger which allows to flash/debug and
monitor UART
from the USB port.</p>
<figure class="align-center" id="id1">
-<img alt="../../../../../_images/pinout.webp"
src="../../../../../_images/pinout.webp" />
+<img alt="../../../../../_images/pinout.png"
src="../../../../../_images/pinout.png" />
<figcaption>
<p><span class="caption-text">Pinout diagram</span><a class="headerlink"
href="#id1" title="Permalink to this image"></a></p>
</figcaption>
diff --git a/content/docs/latest/reference/os/newreno.html
b/content/docs/latest/reference/os/newreno.html
new file mode 100644
index 00000000..65b234ba
--- /dev/null
+++ b/content/docs/latest/reference/os/newreno.html
@@ -0,0 +1,345 @@
+<!--
+ Documentation/_templates/layout.html
+
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+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
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+
+ <section id="congestion-control-newreno">
+<h1>Congestion Control NewReno<a class="headerlink"
href="#congestion-control-newreno" title="Permalink to this headline"></a></h1>
+<dl>
+<dt>NewReno congestion control algorithm is used to solve the problem of
network congestion breakdown, which includes:</dt><dd><ul class="simple">
+<li><p>Slow Start</p></li>
+<li><p>Congestion Avoidance</p></li>
+<li><p>Fast Retransmission</p></li>
+<li><p>Fast Recovery.</p></li>
+</ul>
+<p>The implementation refers to RFC6582 and RFC5681. In addition, we optimize
the congestion algorithm. In the congestion avoidance state, the maximum
congestion window (max_cwnd) is used to limit the excessive growth of cwnd and
prevent network jitter caused by congestion. Maximum congestion window
(max_cwnd) is updated with the current congestion window (cwnd) and the update
weight is 0.875 when an RTO timeout occurs.</p>
+</dd>
+</dl>
+<section id="workflow">
+<h2>Workflow<a class="headerlink" href="#workflow" title="Permalink to this
headline"></a></h2>
+<p>The NewReno on the tcp sender adjusts the cwnd and ssthresh based on
received ack and Retransmitted Timeout (RTO) events.</p>
+<p>Using the cwnd, together with snd_wnd, controls the number of bytes sent to
the network. Here’s how newreno works, as following:</p>
+<ul class="simple">
+<li><p>Initialize the ssthresh and cwnd, on establishing the tcp
connection.</p></li>
+<li><p>When the ack is received, check whether the ack is repeated.</p></li>
+</ul>
+<blockquote>
+<div><ul class="simple">
+<li><p>If yes, increase the dupack counts. If the dupack exceeds the Fast
Retransmission Threshold 3, after retransmitting the lost segments (Fast
Retransmission), enter to the Fast Recovery state.</p></li>
+<li><p>If no, receive the new ack.</p>
+<ul>
+<li><p>If the current ackno is bigger than fr_ack which is the snd_seq when
Fast Retransmission ocurrs, exit the Fast Recovery state and enter to
congestion avoidance.</p></li>
+<li><p>If the cwnd is less than ssthresh, increase the cwnd on slow start
state.</p></li>
+<li><p>If the cwnd is greater than or equal to ssthresh, the increased cwnd
can not exceed max_cwnd.</p></li>
+</ul>
+</li>
+</ul>
+</div></blockquote>
+<ul class="simple">
+<li><p>when RTO times out, reset the values of cwnd and ssthresh, update the
max_cwnd, and enter to Slow Start state.</p></li>
+<li><p>When sending a segment, the minimum value of cwnd and snd_wnd is used
to calculate the number of bytes that can be sent.</p></li>
+</ul>
+<p>The simple state transition diagram of the NewReno is shown below.</p>
+<div class="highlight-none notranslate"><div
class="highlight"><pre><span></span> | ^
+ | ------------------------
+ | initialize cwnd ssthresh
+ V
+ +------------+
+.--------------->| Slow Start |-----------------.
+| +------------+ |
+| | | |
+| timeout | | recv dup ack | recv new ack
+|------------------ | | --------------- | ----------------
+|reset cwnd ssthresh | | dupack >= 3 | cwnd >= ssthresh
+|update max_cwnd | | fr_ack = snd_seq |
+|<--------------------' |<------------------. |
+| | | |
+| v | V
+| +--------+ +--------------------+
+| | FT | |Congestion Avoidance|
+| +--------+ +--------------------+
+| | ^ |
+| retransmit|lost segment | |
+| | | |
+| | recv new ack | |
+| v ------------ | |
+| +--------+ ack > fr_ack | |
+| | FR |--------------' |
+| +--------+ |
+| | |
+| v v
+'-----------------------------------------------'
+</pre></div>
+</div>
+</section>
+<section id="configuration-options">
+<h2>Configuration Options<a class="headerlink" href="#configuration-options"
title="Permalink to this headline"></a></h2>
+<dl>
+<dt><code class="docutils literal notranslate"><span
class="pre">NET_TCP_CC_NEWRENO</span></code></dt><dd><p>Enable or disable
NewRenofunction.</p>
+<p>Depends on <code class="docutils literal notranslate"><span
class="pre">NET_TCP_FAST_RETRANSMIT</span></code>.</p>
+</dd>
+</dl>
+</section>
+<section id="test">
+<h2>Test<a class="headerlink" href="#test" title="Permalink to this
headline"></a></h2>
+<section id="test-topology">
+<h3>Test topology<a class="headerlink" href="#test-topology" title="Permalink
to this headline"></a></h3>
+<div class="highlight-none notranslate"><div
class="highlight"><pre><span></span> IP:10.0.1.1
+
+ +--------+
+ --------| nuttx0 |--------
+ | +--------+ |
+ | /|\ |
+ | | |
+ | +-------+ |
+ | | ifb0 | |
+ | +-------+ |
+ \|/ /|\ \|/
+ +-------+ | +-------+
+ | tap0 |------/ \-------| tap1 |
+ +-------+ +-------+
+ /|\ /|\
+ | |
+ \|/ \|/
+ +-------+ +-------+
+sim1 | eth0 | | eth0 | sim2
+ +-------+ +-------+
+
+ IP:10.0.1.3 IP:10.0.1.4
+</pre></div>
+</div>
+</section>
+<section id="test-steps">
+<h3>Test steps<a class="headerlink" href="#test-steps" title="Permalink to
this headline"></a></h3>
+<p>Test the function on the Ubuntu 22.04 x86_64 with NuttX SIM by following
steps:</p>
+<dl class="field-list simple">
+<dt class="field-odd">1.Configure the test environment</dt>
+<dd class="field-odd"><p></p></dd>
+</dl>
+<ul class="simple">
+<li><p>Set the nuttx0 inbound speed to 10Mbps.</p></li>
+</ul>
+<blockquote>
+<div><div class="highlight-bash notranslate"><div
class="highlight"><pre><span></span><span class="c1"># Load fib module, and
start ifb0 interface</span>
+modprobe ifb
+ip link <span class="nb">set</span> dev ifb0 up
+
+<span class="c1"># Import the nuttx0 ingress packets into ifb0</span>
+tc qdisc add dev nuttx0 handle ffff: ingress
+tc filter add dev nuttx0 parent ffff: u32 match u32 <span class="m">0</span>
<span class="m">0</span> action mirred egress redirect dev ifb0
+
+<span class="c1"># Limit nuttx0 ingress 10Mbps</span>
+tc qdisc add dev ifb0 root tbf rate 10Mbit latency 50ms burst <span
class="m">1540</span>
+</pre></div>
+</div>
+</div></blockquote>
+<ul class="simple">
+<li><p>configure the sim simulator.</p></li>
+</ul>
+<blockquote>
+<div><ul class="simple">
+<li><p>Start iperf3 server on ubuntu.</p></li>
+</ul>
+<div class="highlight-bash notranslate"><div
class="highlight"><pre><span></span>iperf3 -s -i1 -p10003 <span
class="c1">#for sim1</span>
+iperf3 -s -i1 -p10004 <span class="c1">#for sim2</span>
+</pre></div>
+</div>
+<ul class="simple">
+<li><p>start the emulators sim1 and sim2 and configure ip addresses.</p></li>
+</ul>
+<div class="highlight-bash notranslate"><div
class="highlight"><pre><span></span><span class="c1"># start and configure
sim1</span>
+start gdb nuttx
+ifconfig eth0 <span class="m">10</span>.0.1.3
+
+<span class="c1"># start and configure sim2</span>
+start gdb nuttx
+ifconfig eth0 <span class="m">10</span>.0.1.4 <span class="c1"># sim2</span>
+</pre></div>
+</div>
+</div></blockquote>
+<dl class="field-list simple">
+<dt class="field-odd">2.Stream Testing</dt>
+<dd class="field-odd"><p></p></dd>
+</dl>
+<ul class="simple">
+<li><p>Use iperf3 to perform the stream testing.</p></li>
+</ul>
+<blockquote>
+<div><div class="highlight-bash notranslate"><div
class="highlight"><pre><span></span>iperf3 -c <span class="m">10</span>.0.1.1
-i1 -t60 -p10003 <span class="c1"># sim1</span>
+
+iperf3 -c <span class="m">10</span>.0.1.1 -i1 -t60 -p10004 <span class="c1">#
sim2</span>
+</pre></div>
+</div>
+</div></blockquote>
+<dl class="field-list simple">
+<dt class="field-odd">3.Comparison Testing</dt>
+<dd class="field-odd"><p>Compares the test results of enabling and disabling
NewReno.</p>
+</dd>
+</dl>
+</section>
+<section id="test-results">
+<h3>Test results<a class="headerlink" href="#test-results" title="Permalink to
this headline"></a></h3>
+<blockquote>
+<div><p>The test results should indicate that the total network throughput was
significantly increased when NewReno congestion control was enabled, which was
close to the actual total network bandwidth, and the rates of both sim devices
were stable.</p>
+</div></blockquote>
+</section>
+</section>
+</section>
+
+
+ </div>
+ </div>
+ <footer>
+
+ <hr/>
+
+ <div role="contentinfo">
+ <p>© Copyright 2020, The Apache Software Foundation.</p>
+ </div>
+
+
+
+</footer>
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