[nuttx] branch master updated: arch/arm: Add a "cc" flag to instructions that may modify condition flag.

[xiaoxiang]

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 3d47505ec7 arch/arm: Add a "cc" flag to instructions that may modify 
condition flag.
3d47505ec7 is described below

commit 3d47505ec7c6d0302929a9d4d71678d3df2bdd7d
Author: zhangyuan21 <zhangyua...@xiaomi.com>
AuthorDate: Wed Apr 26 17:07:24 2023 +0800

    arch/arm: Add a "cc" flag to instructions that may modify condition flag.
    
    Notify the compiler that the condition flag has changed to prevent the
    compiler from optimizing and reordering instructions, which may cause 
exceptions.
    
    Signed-off-by: zhangyuan21 <zhangyua...@xiaomi.com>
---
 arch/arm/include/arm/irq.h                    | 6 +++---
 arch/arm/include/armv7-m/irq.h                | 2 +-
 arch/arm/include/armv8-m/irq.h                | 2 +-
 arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c | 2 +-
 arch/arm/src/tiva/common/tiva_eeprom.c        | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/arm/irq.h b/arch/arm/include/arm/irq.h
index 62cbed6a0a..2d65c735f0 100644
--- a/arch/arm/include/arm/irq.h
+++ b/arch/arm/include/arm/irq.h
@@ -187,7 +187,7 @@ static inline irqstate_t up_irq_save(void)
      "\tmsr    cpsr_c, %1"
      : "=r" (flags), "=r" (temp)
      :
-     : "memory");
+     : "cc", "memory");
   return flags;
 }
 
@@ -200,7 +200,7 @@ static inline void up_irq_restore(irqstate_t flags)
      "msr    cpsr_c, %0"
      :
      : "r" (flags)
-     : "memory");
+     : "cc", "memory");
 }
 
 /* Enable IRQs and return the previous IRQ state */
@@ -216,7 +216,7 @@ static inline irqstate_t up_irq_enable(void)
      "\tmsr    cpsr_c, %1"
      : "=r" (flags), "=r" (temp)
      :
-     : "memory");
+     : "cc", "memory");
   return flags;
 }
 #endif /* __ASSEMBLY__ */
diff --git a/arch/arm/include/armv7-m/irq.h b/arch/arm/include/armv7-m/irq.h
index a3e467e3c5..626072c47d 100644
--- a/arch/arm/include/armv7-m/irq.h
+++ b/arch/arm/include/armv7-m/irq.h
@@ -457,7 +457,7 @@ static inline void up_irq_restore(irqstate_t flags)
       "1:\n"
       :
       : "r" (flags)
-      : "memory");
+      : "cc", "memory");
 
 #endif
 }
diff --git a/arch/arm/include/armv8-m/irq.h b/arch/arm/include/armv8-m/irq.h
index 066a575427..0c1809f13f 100644
--- a/arch/arm/include/armv8-m/irq.h
+++ b/arch/arm/include/armv8-m/irq.h
@@ -430,7 +430,7 @@ static inline void up_irq_restore(irqstate_t flags)
       "1:\n"
       :
       : "r" (flags)
-      : "memory");
+      : "cc", "memory");
 
 #endif
 }
diff --git a/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c 
b/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
index 833d083071..22703e4f82 100644
--- a/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
+++ b/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
@@ -81,7 +81,7 @@ static inline void tiva_delay(uint32_t delay)
   __asm__ __volatile__("1:\n"
                        "\tsubs  %0, #1\n"
                        "\tbne   1b\n"
-                       : "=r"(delay) : "r"(delay));
+                       : "=r"(delay) : "r"(delay) : "cc");
 }
 
 /****************************************************************************
diff --git a/arch/arm/src/tiva/common/tiva_eeprom.c 
b/arch/arm/src/tiva/common/tiva_eeprom.c
index 223a9ff917..d18d66c1a3 100644
--- a/arch/arm/src/tiva/common/tiva_eeprom.c
+++ b/arch/arm/src/tiva/common/tiva_eeprom.c
@@ -164,7 +164,7 @@ static inline void tiva_delay(uint32_t delay)
   __asm__ __volatile__("1:\n"
                        "\tsubs  %0, #1\n"
                        "\tbne   1b\n"
-                       : "=r"(delay) : "r"(delay));
+                       : "=r"(delay) : "r"(delay) : "cc");
 }
 
 /****************************************************************************