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The following commit(s) were added to refs/heads/master by this push:
new 5f1dca63ae arch/xtensa/esp32: Add missing SPI Flash ROM functions
5f1dca63ae is described below
commit 5f1dca63aebf055a04ebd7b909afd061a2cb67d9
Author: Lucas Saavedra Vaz <[email protected]>
AuthorDate: Fri May 26 08:50:13 2023 -0300
arch/xtensa/esp32: Add missing SPI Flash ROM functions
Add missing ROM functions and clear source files
---
arch/xtensa/src/esp32/esp32_spiflash.c | 88 +------------------------
arch/xtensa/src/esp32/rom/esp32_spiflash.h | 53 ++++++++++++++-
boards/xtensa/esp32/common/scripts/esp32_rom.ld | 21 ++++--
3 files changed, 68 insertions(+), 94 deletions(-)
diff --git a/arch/xtensa/src/esp32/esp32_spiflash.c
b/arch/xtensa/src/esp32/esp32_spiflash.c
index e4297bf14d..c788fdf3d3 100644
--- a/arch/xtensa/src/esp32/esp32_spiflash.c
+++ b/arch/xtensa/src/esp32/esp32_spiflash.c
@@ -264,15 +264,6 @@ static int esp32_writeblk_encrypted(struct
esp32_spiflash_s *priv,
const uint8_t *buffer,
uint32_t nbytes);
-#if 0
-static int esp32_read_highstatus(struct esp32_spiflash_s *priv,
- uint32_t *status);
-#endif
-#if 0
-static int esp32_write_status(struct esp32_spiflash_s *priv,
- uint32_t status);
-#endif
-
#ifdef CONFIG_ESP32_SPI_FLASH_SUPPORT_PSRAM_STACK
static void esp32_spiflash_work(void *p);
#endif
@@ -729,7 +720,7 @@ static void IRAM_ATTR esp32_set_read_opt(struct
esp32_spiflash_s *priv)
* Name: esp32_set_write_opt
*
* Description:
- * Set SPI Flash to be direct read mode. Due to different SPI I/O mode
+ * Set SPI Flash to be direct write mode. Due to different SPI I/O mode
* including DIO, QIO and so on. Different command and communication
* timing sequence are needed.
*
@@ -846,83 +837,6 @@ static int IRAM_ATTR esp32_wait_idle(struct
esp32_spiflash_s *priv)
return OK;
}
-/****************************************************************************
- * Name: esp32_read_highstatus
- *
- * Description:
- * Read SPI Flash high status register value.
- *
- * Input Parameters:
- * spi - ESP32 SPI Flash chip data
- * status - status buffer pointer
- *
- * Returned Value:
- * 0 if success or a negative value if fail.
- *
- ****************************************************************************/
-
-#if 0
-static int esp32_read_highstatus(struct esp32_spiflash_s *priv,
- uint32_t *status)
-{
- uint32_t regval;
-
- if (esp32_wait_idle(priv))
- {
- return -EIO;
- }
-
- if (esp_rom_spiflash_read_user_cmd(®val, 0x35))
- {
- return -EIO;
- }
-
- *status = regval << 8;
-
- return 0;
-}
-#endif
-
-/****************************************************************************
- * Name: esp32_write_status
- *
- * Description:
- * Write status value to SPI Flash status register.
- *
- * Input Parameters:
- * spi - ESP32 SPI Flash chip data
- * status - status data
- *
- * Returned Value:
- * 0 if success or a negative value if fail.
- *
- ****************************************************************************/
-
-#if 0
-static int esp32_write_status(struct esp32_spiflash_s *priv,
- uint32_t status)
-{
- if (esp32_wait_idle(priv))
- {
- return -EIO;
- }
-
- spi_set_reg(priv, SPI_RD_STATUS_OFFSET, status);
- spi_set_reg(priv, SPI_CMD_OFFSET, SPI_FLASH_WRSR);
- while (spi_get_reg(priv, SPI_CMD_OFFSET) != 0)
- {
- ;
- }
-
- if (esp32_wait_idle(priv))
- {
- return -EIO;
- }
-
- return 0;
-}
-#endif
-
/****************************************************************************
* Name: esp32_enable_write
*
diff --git a/arch/xtensa/src/esp32/rom/esp32_spiflash.h
b/arch/xtensa/src/esp32/rom/esp32_spiflash.h
index 597d78da45..a61461a85f 100644
--- a/arch/xtensa/src/esp32/rom/esp32_spiflash.h
+++ b/arch/xtensa/src/esp32/rom/esp32_spiflash.h
@@ -323,7 +323,7 @@ esp_rom_spiflash_read_status(esp32_spiflash_chip_t *spi,
uint32_t *status);
/*****************************************************************************
- * Name: esp32_spiflash_read_statushigh
+ * Name: esp_rom_spiflash_read_statushigh
*
* Description:
* SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
@@ -344,8 +344,8 @@ esp_rom_spiflash_read_status(esp32_spiflash_chip_t *spi,
*****************************************************************************/
esp_rom_spiflash_result_t
-esp32_spiflash_read_statushigh(esp32_spiflash_chip_t *spi,
- uint32_t *status);
+esp_rom_spiflash_read_statushigh(esp32_spiflash_chip_t *spi,
+ uint32_t *status);
/*****************************************************************************
* Name: esp32_spiflash_write_status
@@ -657,6 +657,53 @@ esp_rom_spiflash_write(uint32_t dest_addr,
const uint32_t *src,
int32_t len);
+/*****************************************************************************
+ * Name: esp_rom_spiflash_enable_write
+ *
+ * Description:
+ * Enable Flash write.
+ *
+ * Please do not call this function in SDK.
+ *
+ * Input Parameters:
+ * esp32_spiflash_chip_t *spi : The information for Flash, which is exported
+ * from ld file.
+ *
+ * Returned Value:
+ * ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+ * ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+ * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+ *
+ *****************************************************************************/
+
+esp_rom_spiflash_result_t
+esp_rom_spiflash_enable_write(esp32_spiflash_chip_t *spi);
+
+/*****************************************************************************
+ * Name: esp_rom_spiflash_write_status
+ *
+ * Description:
+ * Write status to Flash status register.
+ *
+ * Please do not call this function in SDK.
+ *
+ * Input Parameters:
+ * esp32_spiflash_chip_t *spi : The information for Flash, which is exported
+ * from ld file.
+ *
+ * uint32_t status_value : Value to write.
+ *
+ * Returned Value:
+ * ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
+ * ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
+ * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
+ *
+ *****************************************************************************/
+
+esp_rom_spiflash_result_t
+esp_rom_spiflash_write_status(esp32_spiflash_chip_t *spi,
+ uint32_t status_value);
+
/*****************************************************************************
* Name: esp_rom_spiflash_read
*
diff --git a/boards/xtensa/esp32/common/scripts/esp32_rom.ld
b/boards/xtensa/esp32/common/scripts/esp32_rom.ld
index efc1275f6e..43964d41f0 100644
--- a/boards/xtensa/esp32/common/scripts/esp32_rom.ld
+++ b/boards/xtensa/esp32/common/scripts/esp32_rom.ld
@@ -1992,14 +1992,27 @@ PROVIDE ( xthal_set_intclear = 0x4000c1ec );
PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
PROVIDE ( g_ticks_per_us_pro = 0x3ffe01e0 );
PROVIDE ( g_ticks_per_us_app = 0x3ffe40f0 );
+PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
+PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
PROVIDE ( esp_rom_spiflash_config_param = 0x40063238 );
+PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /*
SPIMasterReadModeCnfig */
+PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
+PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
+PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
+PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
+PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
+PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
+PROVIDE ( esp_rom_spiflash_prepare_encrypted_data = 0x40062e1c );
+PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
+PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
+PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
PROVIDE ( esp_rom_spiflash_read_user_cmd = 0x400621b0 );
+PROVIDE ( esp_rom_spiflash_select_qio_pins = 0x40061ddc );
+PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
+PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
PROVIDE ( esp_rom_spiflash_write_encrypted_disable = 0x40062e60 );
PROVIDE ( esp_rom_spiflash_write_encrypted_enable = 0x40062df4 );
-PROVIDE ( esp_rom_spiflash_prepare_encrypted_data = 0x40062e1c );
-PROVIDE ( esp_rom_spiflash_select_qio_pins = 0x40061ddc );
-PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
-PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
+PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
PROVIDE ( g_rom_spiflash_chip = 0x3ffae270 );
PROVIDE ( hci_le_rd_rem_used_feats_cmd_handler = 0x400417b4 );
PROVIDE ( llcp_length_req_handler = 0x40043808 );
