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commit 108c47c07b0829c4e08bd4a9b12a513411848661 Author: liaoao <[email protected]> AuthorDate: Sun Apr 23 11:57:19 2023 +0800 procfs：add armv7-m cpuinfo Signed-off-by: liaoao <[email protected]> --- arch/arm/Kconfig | 1 + arch/arm/src/armv7-m/Make.defs | 2 +- arch/arm/src/armv7-m/arm_cpuinfo.c | 158 +++++++++++++++++++++++++++++++++++++ arch/arm/src/common/hwcap.h | 69 ++++++++++++++++ include/nuttx/fs/procfs.h | 2 +- 5 files changed, 230 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 114ed5fd92..1c9d8a730b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -718,6 +718,7 @@ config ARCH_CORTEXM0 config ARCH_ARMV7M bool default n + select ARCH_HAVE_CPUINFO config ARCH_CORTEXM3 bool diff --git a/arch/arm/src/armv7-m/Make.defs b/arch/arm/src/armv7-m/Make.defs index 056a5d582f..2cdb688b89 100644 --- a/arch/arm/src/armv7-m/Make.defs +++ b/arch/arm/src/armv7-m/Make.defs @@ -24,7 +24,7 @@ include common/Make.defs CMN_ASRCS += arm_exception.S arm_saveusercontext.S -CMN_CSRCS += arm_busfault.c arm_cache.c arm_doirq.c +CMN_CSRCS += arm_busfault.c arm_cache.c arm_cpuinfo.c arm_doirq.c CMN_CSRCS += arm_hardfault.c arm_initialstate.c arm_itm.c CMN_CSRCS += arm_memfault.c arm_perf.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c diff --git a/arch/arm/src/armv7-m/arm_cpuinfo.c b/arch/arm/src/armv7-m/arm_cpuinfo.c new file mode 100644 index 0000000000..0b677e651e --- /dev/null +++ b/arch/arm/src/armv7-m/arm_cpuinfo.c @@ -0,0 +1,158 @@ +/**************************************************************************** + * arch/arm/src/armv7-m/arm_cpuinfo.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/fs/procfs.h> +#include <nuttx/arch.h> + +#include "arm_internal.h" +#include "hwcap.h" +#include "nvic.h" + +#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_CPUINFO) + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * name: hwcap_extract_field + ****************************************************************************/ + +static int hwcap_extract_field(uint32_t features, int field) +{ + int feature; + + feature = (features >> field) & 0xf; + if (feature > 7) + feature -= 16; + + return feature; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * name: up_show_cpuinfo + ****************************************************************************/ + +ssize_t up_show_cpuinfo(FAR char *buf, size_t buf_size, off_t file_off) +{ + int i; + uint32_t cpuid; + + for (i = 0; i < CONFIG_SMP_NCPUS; i++) + { + procfs_sprintf(buf, buf_size, &file_off, "processor\t: %d\n", i); + procfs_sprintf(buf, buf_size, &file_off, "BogoMIPS\t: %u.%02u\n", + (CONFIG_BOARD_LOOPSPERMSEC / 1000), + (CONFIG_BOARD_LOOPSPERMSEC / 10) % 100); + procfs_sprintf(buf, buf_size, &file_off, "cpu MHz\t\t: %lu.%02lu\n", + up_perf_getfreq() / 1000000, + (up_perf_getfreq() / 10000) % 100); + + /* CPU Features */ + + procfs_sprintf(buf, buf_size, &file_off, "Features\t:"); + procfs_sprintf(buf, buf_size, &file_off, " %s %s", + HWCAP_HALF, HWCAP_FAST_MULT); + + /* If the CPU supports LDREX/STREX and LDREXB/STREXB, + * avoid advertising SWP; it may not be atomic with + * multiprocessing cores. + */ + + if (hwcap_extract_field(getreg32(NVIC_ISAR3), 12) <= 1 && + hwcap_extract_field(getreg32(NVIC_ISAR4), 20) < 3) + { + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_SWP); + } + + if (hwcap_extract_field(getreg32(NVIC_ISAR0), 24) == 1) +#ifdef CONFIG_ARM_THUMB + { + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_IDIVT); + } + + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_THUMB); +#else + { + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_IDIVA); + } +#endif + +#if defined(CONFIG_ARCH_CORTEXM4) || defined(CONFIG_ARCH_CORTEXM7) + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_EDSP); +#endif + +#ifdef CONFIG_SCHED_THREAD_LOCAL + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_TLS); +#endif + + /* LPAE implies atomic ldrd/strd instructions */ + + if (hwcap_extract_field(getreg32(NVIC_ISAR2), 0) == 1) + { + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_LPAE); + } + + /* VFP Features */ + +#if defined(CONFIG_ARCH_FPU) +# ifdef CONFIG_ARCH_CORTEXM4 + procfs_sprintf(buf, buf_size, &file_off, " %s %s %s", + HWCAP_VFPV4, HWCAP_FPSP, HWCAP_VFPV3D16); +# elif defined(CONFIG_ARCH_CORTEXM7) + procfs_sprintf(buf, buf_size, &file_off, " %s %s %s", + HWCAP_FPV5, HWCAP_FPSP, HWCAP_VFPV3D16); +# ifdef CONFIG_ARCH_DPFPU + procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_FPDP); +# endif +# endif +#endif + + /* Cpuid info */ + + cpuid = getreg32(NVIC_CPUID_BASE); + procfs_sprintf(buf, buf_size, &file_off, + "\nmodel name\t: %s rev %" PRIx32 " (%s)\n" + "CPU architecture: %s\n", + "ARMv7-M", cpuid & 15, "v7ml", "7M"); + + procfs_sprintf(buf, buf_size, &file_off, + "CPU implementer\t: 0x%02" PRIx32 "\n" + "CPU variant\t: 0x%" PRIx32 "\n" + "CPU part\t: 0x%03" PRIx32 "\n" + "CPU revision\t: %" PRIu32"\n\n", + cpuid >> 24, + (cpuid >> 20) & 0xf, + (cpuid >> 4) & 0xfff, + cpuid & 0xf); + } + + return -file_off; +} +#endif /* CONFIG_FS_PROCFS && !CONFIG_FS_PROCFS_EXCLUDE_CPUINFO */ diff --git a/arch/arm/src/common/hwcap.h b/arch/arm/src/common/hwcap.h new file mode 100644 index 0000000000..eba334ae1e --- /dev/null +++ b/arch/arm/src/common/hwcap.h @@ -0,0 +1,69 @@ +/**************************************************************************** + * arch/arm/src/common/hwcap.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_COMMON_HWCAP_H +#define __ARCH_ARM_SRC_COMMON_HWCAP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Hardware capabilities */ + +#define HWCAP_SWP "swp" /* SWP instruction */ +#define HWCAP_HALF "half" /* Half word */ +#define HWCAP_THUMB "thumb" /* Thumb instruction set support */ +#define HWCAP_26BIT "26bit" /* Play it safe */ +#define HWCAP_FAST_MULT "fastmult" /* Long multiply such as umull and umlal */ +#define HWCAP_FPA "fpa" +#define HWCAP_VFP "vfp" +#define HWCAP_EDSP "edsp" /* Enhanced dsp instruction */ +#define HWCAP_JAVA "java" +#define HWCAP_IWMMXT "iwmmxt" +#define HWCAP_CRUNCH "crunch" +#define HWCAP_THUMBEE "thumbee" +#define HWCAP_NEON "neon" /* Advanced SIMD extension */ +#define HWCAP_VFPV3 "vfpv3" /* Floating-point extension version */ +#define HWCAP_VFPV3D16 "vfpv3d16" /* Also set for vfpv4-d16 */ +#define HWCAP_TLS "tls" /* Thread local storage */ +#define HWCAP_VFPV4 "vfpv4" /* Floating-point extension version */ +#define HWCAP_IDIVA "idiva" /* SDIV and UDIV instruction */ +#define HWCAP_IDIVT "idivt" /* SDIV and UDIV in thumb instruction set */ +#define HWCAP_VFPD32 "vfpd32" /* Set if VFP has 32 64-bit regs (not 16) */ +#define HWCAP_LPAE "lpae" /* LDRD/STRD instructions */ +#define HWCAP_EVTSTRM "evtstrm" +#define HWCAP_FPHP "fphp" /* Half-precision instructions support */ +#define HWCAP_FPSP "fpsp" /* Single-precision instructions support */ +#define HWCAP_FPDP "fpdp" /* Double-precision instructions support */ +#define HWCAP_FPV5 "fpv5" /* Floating-point extension version */ + +/* Hardware capabilities added form armv8 */ + +#define HWCAP2_AES "aes" +#define HWCAP2_PMULL "pmull" +#define HWCAP2_SHA1 "sha1" +#define HWCAP2_SHA2 "sha2" +#define HWCAP2_CRC32 "crc32" + +#endif /* __ARCH_ARM_SRC_COMMON_HWCAP_H */ diff --git a/include/nuttx/fs/procfs.h b/include/nuttx/fs/procfs.h index 04a64d69e9..f14dceeca9 100644 --- a/include/nuttx/fs/procfs.h +++ b/include/nuttx/fs/procfs.h @@ -241,7 +241,7 @@ int procfs_snprintf(FAR char *buf, size_t size, ****************************************************************************/ void procfs_sprintf(FAR char *buf, size_t size, FAR off_t *offset, - FAR const IPTR char *format, ...); + FAR const IPTR char *format, ...) printf_like(4, 5); /**************************************************************************** * Name: procfs_register
