slorquet commented on code in PR #9530:
URL: https://github.com/apache/nuttx/pull/9530#discussion_r1229162693


##########
arch/arm/src/stm32h7/stm32_serial.c:
##########
@@ -2660,6 +2719,201 @@ static int up_ioctl(struct file *filep, int cmd, 
unsigned long arg)
      break;
 #endif
 
+#ifdef CONFIG_STM32H7_USART_SMARTCARD
+    case TIOCGSMARTCARD:
+      {
+        struct serial_smartcard_s *sc = (struct serial_smartcard_s *)arg;
+
+        /* Determine argument validity */
+
+        if (!sc)
+          {
+            ret = -EINVAL;
+            break;
+          }
+
+        /* Determine if this uart supports smartcard mode */
+
+        if (!priv->sc_supported)
+          {
+            ret = -ENOTTY;
+            break;
+          }
+
+        memcpy(sc, &priv->smartcard, sizeof(struct serial_smartcard_s));
+        break;
+      }
+
+    case TIOCSSMARTCARD:
+      {
+        struct serial_smartcard_s *sc = (struct serial_smartcard_s *)arg;
+        uint32_t cr1;
+        uint32_t cr1_ue;
+        uint32_t cr2;
+        uint32_t cr3;
+        uint32_t gtpr;
+        irqstate_t flags;
+
+        /* Determine argument validity */
+
+        if (!sc)
+          {
+            ret = -EINVAL;
+            break;
+          }
+
+        /* Determine if this uart supports smartcard mode */
+
+        if (!priv->sc_supported)
+          {
+            ret = -ENOTTY;
+            break;
+          }
+
+        memcpy(&priv->smartcard, sc, sizeof(struct serial_smartcard_s));
+
+        flags = enter_critical_section();
+
+        /* Get the original state of UE */
+
+        cr1  = up_serialin(priv, STM32_USART_CR1_OFFSET);
+        cr1_ue = cr1 & USART_CR1_UE;
+        cr1 &= ~USART_CR1_UE;
+
+        /* Disable UE, config can only be written when UE=0 */
+
+        up_serialout(priv, STM32_USART_CR1_OFFSET, cr1);
+
+        /* Read smart card related registers */
+
+        cr2  = up_serialin(priv, STM32_USART_CR2_OFFSET);
+        cr3  = up_serialin(priv, STM32_USART_CR3_OFFSET);
+        gtpr = up_serialin(priv, STM32_USART_GTPR_OFFSET);
+
+        /* Apply settings */
+
+        if (priv->smartcard.enabled)
+          {
+            /* User has requested to enable smart card mode */
+
+            cr3 |= USART_CR3_SCEN | USART_CR3_NACK; /* Always enable NACK */
+
+            /* Smart card mode does not use RX, but uses CLK */
+
+            stm32_unconfiggpio(priv->rx_gpio);
+            if (!priv->ck_gpio)
+              {
+                ret = -EIO;
+                break;
+              }
+
+            stm32_configgpio(priv->ck_gpio);
+
+            /* Note: TX gpio has to be open drain */
+
+            if (priv->smartcard.clken)
+              {
+                /* Enable smart card clock */
+
+                cr2 |=   USART_CR2_CLKEN | USART_CR2_LBCL;
+                cr2 &= ~(USART_CR2_CPOL  | USART_CR2_CPHA);
+              }
+            else
+              {
+                cr2 &= ~USART_CR2_CLKEN; /* Disable smart card clock */
+              }
+
+            if (priv->smartcard.inverse)
+              {
+                /* Enable inverse convention */
+
+                cr2 |= USART_CR2_MSBFIRST | USART_CR2_DATAINV;
+              }
+            else
+              {
+                /* Enable direct convention */
+
+                cr3 &= ~(USART_CR2_MSBFIRST | USART_CR2_DATAINV);
+              }
+
+            if (priv->smartcard.clkout)
+              {
+                /* Compute prescaler to match request,
+                 * then return the actual value.
+                 */
+
+                uint8_t clkdiv = 1;
+                uint32_t divided = priv->apbclock >> 1;
+                while ((divided > priv->smartcard.clkout) && (clkdiv < 31))
+                  {
+                    clkdiv   += 1;
+                    divided >>= 1;
+                  }
+
+                priv->smartcard.clkout = priv->apbclock / (clkdiv << 1);
+                gtpr = (gtpr & ~USART_GTPR_PSC_MASK) |
+                       (clkdiv << USART_GTPR_PSC_SHIFT);
+              }
+
+            if (priv->smartcard.etu)
+              {
+                uint8_t clkdiv;
+                uint32_t etuclock;
+
+                /* Get the current prescaler from gtpr, either the original
+                 * value, or the one that was just updated
+                 */
+
+                clkdiv = (gtpr & USART_GTPR_PSC_MASK) >>
+                         USART_GTPR_PSC_SHIFT;
+                clkdiv <<= 1; /* Actual divider is twice the reg contents */
+
+                /* The refernce clock for the ETU is the divided clock */
+
+                etuclock = priv->apbclock / clkdiv;
+
+                /* Compute baud rate from clock divider and ETU */
+
+                priv->baud      = etuclock / priv->smartcard.etu;
+                priv->bits      = 8;
+                priv->parity    = 2; /* even */
+                priv->stopbits2 = TRUE;
+                up_set_format(dev);
+              }
+
+            if (priv->smartcard.cgt)
+              {
+                gtpr = (gtpr & ~USART_GTPR_GT_MASK) |
+                       (sc->cgt << USART_GTPR_GT_SHIFT);
+              }
+          }
+        else
+          {
+            /* User has requested to disable smart card mode */
+
+            cr3 &= ~USART_CR3_SCEN;
+            cr2 &= ~USART_CR2_CLKEN; /* Disable smart card clock */
+
+            /* Re-enable RX and disable CLK */
+
+            stm32_configgpio  (priv->rx_gpio);

Review Comment:
   Please tell me globally if that kind of alignment within consecutive lines 
is a thing I should continue or not.
   
   I personally find it has cosmetic value and has no drawbacks, but I can 
avoid it.



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