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commit 9d84d79b29a5a659b9f690e1fe62de2da1fa0f98 Author: Masayuki Ishikawa <[email protected]> AuthorDate: Mon Jun 19 22:47:29 2023 +0900 Revert "riscv/saveusercontext: Fix FPU state save" This reverts commit 669196910cb5a9c69b887e5ef30e8cc5e6627b30. --- arch/risc-v/src/common/riscv_saveusercontext.S | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/risc-v/src/common/riscv_saveusercontext.S b/arch/risc-v/src/common/riscv_saveusercontext.S index bbdeca21e0..b89508b3dd 100644 --- a/arch/risc-v/src/common/riscv_saveusercontext.S +++ b/arch/risc-v/src/common/riscv_saveusercontext.S @@ -56,10 +56,7 @@ up_saveusercontext: REGSTORE sp, REG_X2(a0) /* original SP */ REGSTORE x1, REG_EPC(a0) -#ifdef CONFIG_ARCH_FPU - addi a0, a0, INT_XCPT_SIZE /* Save FPU after integer regs */ - riscv_savefpu a0 -#endif + riscv_savefpu a0 li a0, 0 jr ra
