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The following commit(s) were added to refs/heads/master by this push:
     new a59673b526 boards/risc-v: Add support for PINE64 Star64 JH7110 SBC
a59673b526 is described below

commit a59673b5264e6ca89ea092ce257579ae677cab08
Author: Lee Lup Yuen <[email protected]>
AuthorDate: Fri Aug 4 17:16:05 2023 +0800

    boards/risc-v: Add support for PINE64 Star64 JH7110 SBC
    
    This PR adds support for PINE64 Star64 64-bit RISC-V SBC, based on StarFive 
JH7110 SoC. Most of the code is derived from NuttX for QEMU RISC-V (Kernel 
Mode). [The source files are explained in the articles 
here](https://github.com/lupyuen/nuttx-star64)
    
    Modified Files:
    
    boards/Kconfig: Added Star64 board
    
    New Files in boards/risc-v/jh7110/star64:
    
    src/jh7110_appinit.c: Startup Code
    
    include/board.h: Star64 Definitions
    
    include/board_memorymap.h: Memory Map
    
    src/etc/init.d/rc.sysinit, rcS: Startup Script
    
    src/.gitignore: Ignore the tmp filesystem
    
    scripts/ld.script: Linker Script
    
    scripts/Make.defs: Star64 Makefile
    
    src/Makefile: Star64 Makefile
    
    Kconfig: Star64 Config
    
    configs/nsh/defconfig: NSH Build Config
    
    Updated Documentation:
    
    introduction/detailed_support.rst: Added StarFive JH7110 SoC and Star64 SBC
    
    platforms/risc-v/jh7110/index.rst: New page for StarFive JH7110 SoC
    
    platforms/risc-v/jh7110/boards/star64/index.rst: Building and booting NuttX 
for Star64
---
 Documentation/introduction/detailed_support.rst    |   7 +
 .../risc-v/jh7110/boards/star64/index.rst          | 220 +++++++++++++++++++++
 Documentation/platforms/risc-v/jh7110/index.rst    |  29 +++
 boards/Kconfig                                     |  11 ++
 boards/risc-v/jh7110/star64/Kconfig                |   0
 boards/risc-v/jh7110/star64/configs/nsh/defconfig  |  93 +++++++++
 boards/risc-v/jh7110/star64/include/board.h        |  78 ++++++++
 .../risc-v/jh7110/star64/include/board_memorymap.h |  88 +++++++++
 boards/risc-v/jh7110/star64/scripts/Make.defs      |  45 +++++
 boards/risc-v/jh7110/star64/scripts/ld.script      | 150 ++++++++++++++
 boards/risc-v/jh7110/star64/src/.gitignore         |   2 +
 boards/risc-v/jh7110/star64/src/Makefile           |  27 +++
 .../risc-v/jh7110/star64/src/etc/init.d/rc.sysinit |  19 ++
 boards/risc-v/jh7110/star64/src/etc/init.d/rcS     |  19 ++
 boards/risc-v/jh7110/star64/src/jh7110_appinit.c   | 167 ++++++++++++++++
 15 files changed, 955 insertions(+)

diff --git a/Documentation/introduction/detailed_support.rst 
b/Documentation/introduction/detailed_support.rst
index 9a741cd84b..789d829727 100644
--- a/Documentation/introduction/detailed_support.rst
+++ b/Documentation/introduction/detailed_support.rst
@@ -3051,6 +3051,13 @@ Espressif ESP32-C6 Devkit board.
 Please, refer to the :doc:`ESP32-C6 </platforms/risc-v/esp32c6/index>` on 
NuttX for
 further information.
 
+StarFive JH7110
+---------------
+
+The basic port has been completed for the following StarFive JH7110 board:
+
+-  **PINE64 Star64**: Refer to :doc:`PINE64 Star64 
</platforms/risc-v/jh7110/boards/star64/index>` for further information.
+
 ESP32 (Dual Xtensa LX6)
 =======================
 
diff --git a/Documentation/platforms/risc-v/jh7110/boards/star64/index.rst 
b/Documentation/platforms/risc-v/jh7110/boards/star64/index.rst
new file mode 100644
index 0000000000..84d9048094
--- /dev/null
+++ b/Documentation/platforms/risc-v/jh7110/boards/star64/index.rst
@@ -0,0 +1,220 @@
+=============
+PINE64 Star64
+=============
+
+`Star64 <https://wiki.pine64.org/wiki/STAR64>`_ is a 64-bit RISC-V based
+Single Board Computer powered by StarFive JH7110 Quad-Core SiFive U74 64-Bit 
CPU,
+Imagination Technology BX-4-32 GPU and supports up to 8GB 1866MHz LPDDR4 
memory.
+
+It provides an eMMC module socket, MicroSD Card slot, PCI-e, Pi-2 Bus, USB 3.0
+and many other peripheral interfaces for makers to integrate with sensors
+and other devices.
+
+Features
+========
+
+- **System on Chip:** StarFive JH7110
+    - **CPU:** SiFive RISC-V U74 Application Cores (4 cores, RV64GCB) and 
SiFive RISC-V S7 Monitor Core (single core, RV64IMACB)
+    - **GPU:** Imagination Technology BXE-4-32
+    - **RAM:** LPDDR4 2GB / 4GB / 8GB
+- **Video:** Digital Video Output up to 4K @ 30 Hz, 4K HDR @ 60 fps
+- **Audio:** 3.5mm Audio Jack
+- **Ethernet:** Single or Dual 10 / 100 / 1000Mbps
+- **Wireless:** 2.4 GHz / 5 Ghz MIMO WiFi 802.11 b/g/n/ac with Bluetooth 5.2 
(Realtek RTL8852BU)
+- **Storage:** 128 Mbit (16 MByte) XSPI NOR flash Memory, Bootable microSD 
(SDHC and SDXC up to 256 GB), Bootable eMMC
+- **USB:** 1 x USB 3.0 Dedicated Host Port, 3 x USB 2.0 Host Ports
+- **Expansion Ports:** PCIe 2.0 x 1 lane, 2 x 20 pins "Pi2" GPIO Header
+- **MIPI DSI Port:** 4-lane MIPI DSI port for LCD Panel
+- **MIPI CSI Port:** 4-lane MIPI CSI port for Camera Module
+
+Serial Console
+==============
+
+A **USB Serial Adapter** (like `CH340G Serial Adapter 
<https://pine64.com/product/serial-console-woodpecker-edition/>`_)
+is required to run NuttX on Star64.
+
+Connect the USB Serial Adapter to Star64's **GPIO Header** at:
+
+========== ===========
+USB Serial GPIO Header
+========== ===========
+GND        Pin 6 (GND)
+RX         Pin 8 (UART0 TX)
+TX         Pin 10 (UART0 RX)
+========== ===========
+
+On the USB Serial Adapter, set the **Voltage Level** to 3V3.
+
+Connect Star64 to our computer with the USB Serial Adapter.
+On our computer, start a Serial Terminal and connect to the USB Serial Port
+at **115.2 kbps**.
+
+NuttX will appear in the Serial Console when it boots on Star64.
+
+RISC-V Toolchain
+================
+
+Before building NuttX for Star64, download the **RISC-V Toolchain 
riscv64-unknown-elf**
+from `SiFive RISC-V Tools 
<https://github.com/sifive/freedom-tools/releases/tag/v2020.12.0>`_.
+
+Add the downloaded toolchain ``riscv64-unknown-elf-toolchain-.../bin``
+to the ``PATH`` Environment Variable.
+
+Check the RISC-V Toolchain:
+
+.. code:: console
+
+   $ riscv64-unknown-elf-gcc -v
+
+Building
+========
+
+To build NuttX for Star64, :doc:`install the prerequisites 
</quickstart/install>` and
+:doc:`clone the git repositories </quickstart/install>` for ``nuttx`` and 
``apps``.
+
+Configure the NuttX project and build the project:
+
+.. code:: console
+
+   $ cd nuttx
+   $ tools/configure.sh star64:nsh
+   $ make
+   $ riscv64-unknown-elf-objcopy -O binary nuttx nuttx.bin
+
+This produces the NuttX Kernel ``nuttx.bin``.  Next, build the NuttX Apps 
Filesystem:
+
+.. code:: console
+
+   $ make export
+   $ pushd ../apps
+   $ tools/mkimport.sh -z -x ../nuttx/nuttx-export-*.tar.gz
+   $ make import
+   $ popd
+   $ genromfs -f initrd -d ../apps/bin -V "NuttXBootVol"
+
+This generates the Initial RAM Disk ``initrd``.
+
+Download the `Device Tree jh7110-visionfive-v2.dtb 
<https://github.com/starfive-tech/VisionFive2/releases/download/VF2_v3.1.5/jh7110-visionfive-v2.dtb>`_
+from `StarFive VisionFive2 Software Releases 
<https://github.com/starfive-tech/VisionFive2/releases>`_
+into the ``nuttx`` folder.
+
+Inside the ``nuttx`` folder, create a Text File named ``nuttx.its``
+with the following content:
+
+::
+
+   /dts-v1/;
+
+   / {
+     description = "NuttX FIT image";
+     #address-cells = <2>;
+
+     images {
+       vmlinux {
+         description = "vmlinux";
+         data = /incbin/("./nuttx.bin");
+         type = "kernel";
+         arch = "riscv";
+         os = "linux";
+         load = <0x0 0x40200000>;
+         entry = <0x0 0x40200000>;
+         compression = "none";
+       };
+
+       ramdisk {
+         description = "buildroot initramfs";
+         data = /incbin/("./initrd");
+         type = "ramdisk";
+         arch = "riscv";
+         os = "linux";
+         load = <0x0 0x46100000>;
+         compression = "none";
+         hash-1 {
+           algo = "sha256";
+         };
+       };
+
+       fdt {
+         data = /incbin/("./jh7110-visionfive-v2.dtb");
+         type = "flat_dt";
+         arch = "riscv";
+         load = <0x0 0x46000000>;
+         compression = "none";
+         hash-1 {
+           algo = "sha256";
+         };
+       };
+     };
+
+     configurations {
+       default = "nuttx";
+
+       nuttx {
+         description = "NuttX";
+         kernel = "vmlinux";
+         fdt = "fdt";
+         loadables = "ramdisk";
+       };
+     };
+   };
+
+Package the NuttX Kernel, Initial RAM Disk and Device Tree into a
+Flat Image Tree:
+
+.. code:: console
+
+   $ sudo apt install u-boot-tools
+   $ mkimage -f nuttx.its -A riscv -O linux -T flat_dt starfiveu.fit
+
+The Flat Image Tree ``starfiveu.fit`` will be copied to a microSD Card
+in the next step.
+
+Booting
+=======
+
+NuttX boots on Star64 via a microSD Card. To prepare the microSD Card, 
download the
+`microSD Image sdcard.img 
<https://github.com/starfive-tech/VisionFive2/releases/download/VF2_v3.1.5/sdcard.img>`_
+from `StarFive VisionFive2 Software Releases 
<https://github.com/starfive-tech/VisionFive2/releases>`_.
+
+Write the downloaded image to a microSD Card with
+`Balena Etcher <https://www.balena.io/etcher/>`_ or 
+`GNOME Disks <https://wiki.gnome.org/Apps/Disks>`_.
+
+Copy the file ``starfiveu.fit`` from the previous section
+and overwrite the file on the microSD Card.
+
+Check that Star64 is connected to our computer via a USB Serial Adapter.
+
+Insert the microSD Card into Star64 and power up Star64.
+NuttX boots on Star64 and NuttShell (nsh) appears in the Serial Console.
+
+To see the available commands in NuttShell:
+
+.. code:: console
+
+   $ help
+
+`Booting NuttX over TFTP <https://lupyuen.github.io/articles/tftp>`_
+is also supported on Star64.
+
+Configurations
+==============
+
+nsh
+---
+
+Basic configuration that runs NuttShell (nsh).
+This configuration is focused on low level, command-line driver testing.
+Built-in applications are supported, but none are enabled.
+Serial Console is enabled on UART0 at 115.2 kbps.
+
+Peripheral Support
+==================
+
+NuttX for PinePhone supports these peripherals:
+
+======================== ======= =====
+Peripheral               Support NOTES
+======================== ======= =====
+UART                     Yes
+======================== ======= =====
diff --git a/Documentation/platforms/risc-v/jh7110/index.rst 
b/Documentation/platforms/risc-v/jh7110/index.rst
new file mode 100644
index 0000000000..2a5411db9b
--- /dev/null
+++ b/Documentation/platforms/risc-v/jh7110/index.rst
@@ -0,0 +1,29 @@
+===============
+StarFive JH7110
+===============
+
+`StarFive JH7110 <https://doc-en.rvspace.org/Doc_Center/jh7110.html>`_ is a 
64-bit RISC-V SoC that features:
+
+- **CPU:** SiFive RISC-V U74 Application Cores (4 cores, RV64GCB) and SiFive 
RISC-V S7 Monitor Core (single core, RV64IMACB)
+- **GPU:** Imagination Technology BXE-4-32
+- **RAM:** 32-bit LPDDR4 / DDR4 / LPDDR3 / DDR3
+- **Video Decoder:** 4K @ 30 fps multi-stream for H.264/H.265
+- **Video Encoder:** 1080p @ 30 fps multi-stream for H.265
+- **Video Input:** 1 x DVP and 1 x MIPI-CSI with 4D1C
+- **Video Output:** MIPI DSI with 4D1C
+- **HDMI:** 1 x HDMI 2.0 port display up to 4K @ 30 fps
+- **Parallel Interface:**: 24-bit RGB parallel interface
+- **PCIe:** 2 x PCIe 2.0, 1 lane
+- **USB:** USB 3.0 Host / Device
+- **Ethernet:** 2 x Ethernet MAC 1,000 Mbps, 2 x CAN 2.0B
+- **Security:** TRNG, OTP
+- **Peripherals:** UART, I2C, SPI, SDIO, DPI, PCM / I2S, Timers, Temperature 
Sensor, INTC, PWM, WDT, GPIO, DVP, GPCLK
+
+Supported Boards
+================
+
+.. toctree::
+   :glob:
+   :maxdepth: 1
+
+   boards/*/*
diff --git a/boards/Kconfig b/boards/Kconfig
index 87aa420f9d..a9a0b62a09 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -1810,6 +1810,13 @@ config ARCH_BOARD_QEMU_RV_VIRT
                This is the board configuration for the port of NuttX to the
                QEMU RV32 Virt board. This board features the QEMU RV32 CPU.
 
+config ARCH_BOARD_JH7110_STAR64
+       bool "PINE64 Star64"
+       depends on ARCH_CHIP_JH7110
+       ---help---
+               This options selects support for NuttX on PINE64 Star64 based
+               on StarFive JH7110 SoC.
+
 config ARCH_BOARD_S32K118EVB
        bool "NXP S32K118EVB"
        depends on ARCH_CHIP_S32K118
@@ -3057,6 +3064,7 @@ config ARCH_BOARD
        default "mr-canhubk3"               if ARCH_BOARD_MR_CANHUBK3
        default "rv32m1-vega"               if ARCH_BOARD_RV32M1_VEGA
        default "rv-virt"                   if ARCH_BOARD_QEMU_RV_VIRT
+       default "star64"                    if ARCH_BOARD_JH7110_STAR64
        default "sabre-6quad"               if ARCH_BOARD_SABRE_6QUAD
        default "qemu-armv8a"               if ARCH_BOARD_QEMU_ARMV8A
        default "pinephone"                 if ARCH_BOARD_PINEPHONE
@@ -3900,6 +3908,9 @@ endif
 if ARCH_BOARD_QEMU_RV_VIRT
 source "boards/risc-v/qemu-rv/rv-virt/Kconfig"
 endif
+if ARCH_BOARD_JH7110_STAR64
+source "boards/risc-v/jh7110/star64/Kconfig"
+endif
 if ARCH_BOARD_ESP32C3_DEVKIT
 source "boards/risc-v/esp32c3/esp32c3-devkit/Kconfig"
 endif
diff --git a/boards/risc-v/jh7110/star64/Kconfig 
b/boards/risc-v/jh7110/star64/Kconfig
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/boards/risc-v/jh7110/star64/configs/nsh/defconfig 
b/boards/risc-v/jh7110/star64/configs/nsh/defconfig
new file mode 100644
index 0000000000..e2ba62014a
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/configs/nsh/defconfig
@@ -0,0 +1,93 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_DISABLE_OS_API is not set
+# CONFIG_NSH_DISABLE_LOSMART is not set
+CONFIG_16550_ADDRWIDTH=0
+CONFIG_16550_REGINCR=4
+CONFIG_16550_UART0=y
+CONFIG_16550_UART0_BASE=0x10000000
+CONFIG_16550_UART0_CLOCK=23040000
+CONFIG_16550_UART0_IRQ=57
+CONFIG_16550_UART0_SERIAL_CONSOLE=y
+CONFIG_16550_UART=y
+CONFIG_16550_WAIT_LCR=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_ADDRENV=y
+CONFIG_ARCH_BOARD="star64"
+CONFIG_ARCH_BOARD_JH7110_STAR64=y
+CONFIG_ARCH_CHIP="jh7110"
+CONFIG_ARCH_CHIP_JH7110=y
+CONFIG_ARCH_DATA_NPAGES=128
+CONFIG_ARCH_DATA_VBASE=0xC0100000
+CONFIG_ARCH_HEAP_NPAGES=128
+CONFIG_ARCH_HEAP_VBASE=0xC0200000
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_KERNEL_STACKSIZE=3072
+CONFIG_ARCH_PGPOOL_MAPPING=y
+CONFIG_ARCH_PGPOOL_PBASE=0x40600000
+CONFIG_ARCH_PGPOOL_SIZE=4194304
+CONFIG_ARCH_PGPOOL_VBASE=0x40600000
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_TEXT_NPAGES=128
+CONFIG_ARCH_TEXT_VBASE=0xC0000000
+CONFIG_ARCH_USE_MMU=y
+CONFIG_ARCH_USE_MPU=y
+CONFIG_ARCH_USE_S_MODE=y
+CONFIG_BOARDCTL_ROMDISK=y
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=116524
+CONFIG_BUILD_KERNEL=y
+CONFIG_DEBUG_ASSERTIONS=y
+CONFIG_DEBUG_ASSERTIONS_EXPRESSION=y
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEBUG_WARN=y
+CONFIG_DEV_ZERO=y
+CONFIG_ELF=y
+CONFIG_EXAMPLES_HELLO=m
+CONFIG_FS_PROCFS=y
+CONFIG_FS_ROMFS=y
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_INIT_FILEPATH="/system/bin/init"
+CONFIG_INIT_MOUNT=y
+CONFIG_INIT_MOUNT_FLAGS=0x1
+CONFIG_INIT_MOUNT_TARGET="/system/bin"
+CONFIG_INIT_STACKSIZE=3072
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_ENVPATH=y
+CONFIG_LIBC_EXECFUNCS=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_MEMSET_64BIT=y
+CONFIG_MEMSET_OPTSPEED=y
+CONFIG_MM_PGALLOC=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_FILE_APPS=y
+CONFIG_NSH_READLINE=y
+CONFIG_PATH_INITIAL="/system/bin"
+CONFIG_RAM_SIZE=1048576
+CONFIG_RAM_START=0x40200000
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_SERIAL_UART_ARCH_MMIO=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2021
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_NSH_PROGNAME="init"
+CONFIG_TESTING_GETPRIME=y
+CONFIG_USEC_PER_TICK=1000
diff --git a/boards/risc-v/jh7110/star64/include/board.h 
b/boards/risc-v/jh7110/star64/include/board.h
new file mode 100644
index 0000000000..d89fd443c3
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/include/board.h
@@ -0,0 +1,78 @@
+/****************************************************************************
+ * boards/risc-v/jh7110/star64/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_RISCV_JH7110_STAR64_INCLUDE_BOARD_H
+#define __BOARDS_RISCV_JH7110_STAR64_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define LED_STARTED       0  /* N/A */
+#define LED_HEAPALLOCATE  1  /* N/A */
+#define LED_IRQSENABLED   2  /* N/A */
+#define LED_STACKCREATED  3  /* N/A */
+#define LED_INIRQ         4  /* N/A */
+#define LED_SIGNAL        5  /* N/A */
+#define LED_ASSERTION     6  /* N/A */
+#define LED_PANIC         7  /* N/A */
+#define LED_CPU           8  /* LED */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: jh7110_boardinitialize
+ ****************************************************************************/
+
+void jh7110_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_RISCV_JH7110_STAR64_INCLUDE_BOARD_H */
diff --git a/boards/risc-v/jh7110/star64/include/board_memorymap.h 
b/boards/risc-v/jh7110/star64/include/board_memorymap.h
new file mode 100644
index 0000000000..fff0cf0c33
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/include/board_memorymap.h
@@ -0,0 +1,88 @@
+/****************************************************************************
+ * boards/risc-v/jh7110/star64/include/board_memorymap.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_RISCV_JH7110_STAR64_INCLUDE_BOARD_MEMORYMAP_H
+#define __BOARDS_RISCV_JH7110_STAR64_INCLUDE_BOARD_MEMORYMAP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* DDR start address */
+
+#define JH7110_DDR_BASE   (0x40200000)
+#define JH7110_DDR_SIZE   (0x40000000)
+
+/* Kernel code memory (RX) */
+
+#define KFLASH_START    (uintptr_t)__kflash_start
+#define KFLASH_SIZE     (uintptr_t)__kflash_size
+#define KSRAM_START     (uintptr_t)__ksram_start
+#define KSRAM_SIZE      (uintptr_t)__ksram_size
+#define KSRAM_END       (uintptr_t)__ksram_end
+
+/* Kernel RAM (RW) */
+
+#define PGPOOL_START    (uintptr_t)__pgheap_start
+#define PGPOOL_SIZE     (uintptr_t)__pgheap_size
+
+/* Page pool (RWX) */
+
+#define PGPOOL_START    (uintptr_t)__pgheap_start
+#define PGPOOL_SIZE     (uintptr_t)__pgheap_size
+#define PGPOOL_END      (PGPOOL_START + PGPOOL_SIZE)
+
+/* Ramdisk (RW) */
+
+#define RAMDISK_START   (uintptr_t)__ramdisk_start
+#define RAMDISK_SIZE    (uintptr_t)__ramdisk_size
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Kernel code memory (RX)  */
+
+extern uint8_t          __kflash_start[];
+extern uint8_t          __kflash_size[];
+
+/* Kernel RAM (RW) */
+
+extern uint8_t          __ksram_start[];
+extern uint8_t          __ksram_size[];
+extern uint8_t          __ksram_end[];
+
+/* Page pool (RWX) */
+
+extern uint8_t          __pgheap_start[];
+extern uint8_t          __pgheap_size[];
+
+/* Ramdisk (RW) */
+
+extern uint8_t          __ramdisk_start[];
+extern uint8_t          __ramdisk_size[];
+
+#endif /* __BOARDS_RISCV_JH7110_STAR64_INCLUDE_BOARD_MEMORYMAP_H */
diff --git a/boards/risc-v/jh7110/star64/scripts/Make.defs 
b/boards/risc-v/jh7110/star64/scripts/Make.defs
new file mode 100644
index 0000000000..0048a3c6e0
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/scripts/Make.defs
@@ -0,0 +1,45 @@
+############################################################################
+# boards/risc-v/jh7110/star64/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
+
+LDSCRIPT = ld.script
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+
+ARCHCPUFLAGS += -mcmodel=medany
+ARCHPICFLAGS = -fpic -msingle-pic-base
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) 
$(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) 
$(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS += $(CFLAGS) -D__ASSEMBLY__
+
+# ELF module definitions
+
+CELFFLAGS = $(CFLAGS)
+CXXELFFLAGS = $(CXXFLAGS)
+
+LDELFFLAGS = --oformat elf64-littleriscv
+LDELFFLAGS += -r -e main
+LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/binfmt/libelf/gnu-elf.ld)
diff --git a/boards/risc-v/jh7110/star64/scripts/ld.script 
b/boards/risc-v/jh7110/star64/scripts/ld.script
new file mode 100644
index 0000000000..2bb18a5663
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/scripts/ld.script
@@ -0,0 +1,150 @@
+/****************************************************************************
+ * boards/risc-v/jh7110/star64/scripts/ld.script
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+MEMORY
+{
+    kflash (rx) : ORIGIN = 0x40200000, LENGTH = 2048K   /* w/ cache */
+    ksram (rwx) : ORIGIN = 0x40400000, LENGTH = 2048K   /* w/ cache */
+    pgram (rwx) : ORIGIN = 0x40600000, LENGTH = 4096K   /* w/ cache */
+    ramdisk (rwx) : ORIGIN = 0x40A00000, LENGTH = 16M   /* w/ cache */
+}
+
+OUTPUT_ARCH("riscv")
+
+/* Provide the kernel boundaries */
+
+__kflash_start = ORIGIN(kflash);
+__kflash_size = LENGTH(kflash);
+__ksram_start = ORIGIN(ksram);
+__ksram_size = LENGTH(ksram);
+__ksram_end = ORIGIN(ksram) + LENGTH(ksram);
+
+/* Page heap */
+
+__pgheap_start = ORIGIN(pgram);
+__pgheap_size = LENGTH(pgram) + LENGTH(ramdisk);
+
+/* Application ramdisk */
+
+__ramdisk_start = ORIGIN(ramdisk);
+__ramdisk_size = LENGTH(ramdisk);
+__ramdisk_end  = ORIGIN(ramdisk) + LENGTH(ramdisk);
+
+SECTIONS
+{
+  . = 0x40200000;
+
+  .text :
+    {
+      _stext = . ;
+      *(.text)
+      *(.text.*)
+      *(.gnu.warning)
+      *(.stub)
+      *(.glue_7)
+      *(.glue_7t)
+      *(.jcr)
+
+      /* C++ support:  The .init and .fini sections contain specific logic
+       * to manage static constructors and destructors.
+       */
+
+      *(.gnu.linkonce.t.*)
+      *(.init)             /* Old ABI */
+      *(.fini)             /* Old ABI */
+      _etext = . ;
+    }
+
+  .rodata :
+    {
+      _srodata = . ;
+      *(.rodata)
+      *(.rodata1)
+      *(.rodata.*)
+      *(.gnu.linkonce.r*)
+      _erodata = . ;
+    }
+
+  .tdata : {
+      _stdata = ABSOLUTE(.);
+      *(.tdata .tdata.* .gnu.linkonce.td.*);
+      _etdata = ABSOLUTE(.);
+  }
+
+  .tbss : {
+      _stbss = ABSOLUTE(.);
+      *(.tbss .tbss.* .gnu.linkonce.tb.* .tcommon);
+      _etbss = ABSOLUTE(.);
+  }
+
+  _eronly = ABSOLUTE(.);
+
+  .data :
+    {
+      _sdata = . ;
+      *(.data)
+      *(.data1)
+      *(.data.*)
+      *(.gnu.linkonce.d*)
+      . = ALIGN(4);
+      _edata = . ;
+    }
+
+  .bss :
+    {
+      _sbss = . ;
+      *(.bss)
+      *(.bss.*)
+      *(.sbss)
+      *(.sbss.*)
+      *(.gnu.linkonce.b*)
+      *(COMMON)
+      _ebss = . ;
+    } > ksram
+
+    /* Page tables here, align to 4K boundary */
+
+    .pgtables (NOLOAD) : ALIGN(0x1000) {
+        *(.pgtables)
+        . = ALIGN(4);
+    } > ksram
+
+    /* Stack top */
+
+    .stack_top : {
+        . = ALIGN(32);
+        _ebss = ABSOLUTE(.);
+    } > ksram
+
+    /* Stabs debugging sections.    */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/risc-v/jh7110/star64/src/.gitignore 
b/boards/risc-v/jh7110/star64/src/.gitignore
new file mode 100644
index 0000000000..cc92d189b5
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/src/.gitignore
@@ -0,0 +1,2 @@
+etctmp
+etctmp.c
diff --git a/boards/risc-v/jh7110/star64/src/Makefile 
b/boards/risc-v/jh7110/star64/src/Makefile
new file mode 100644
index 0000000000..5e1db22d8e
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/src/Makefile
@@ -0,0 +1,27 @@
+############################################################################
+# boards/risc-v/jh7110/star64/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+RCSRCS = etc/init.d/rc.sysinit etc/init.d/rcS
+
+CSRCS = jh7110_appinit.c
+
+include $(TOPDIR)/boards/Board.mk
diff --git a/boards/risc-v/jh7110/star64/src/etc/init.d/rc.sysinit 
b/boards/risc-v/jh7110/star64/src/etc/init.d/rc.sysinit
new file mode 100644
index 0000000000..e7dbec7a01
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/src/etc/init.d/rc.sysinit
@@ -0,0 +1,19 @@
+/****************************************************************************
+ * boards/risc-v/jh7110/star64/src/etc/init.d/rc.sysinit
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
diff --git a/boards/risc-v/jh7110/star64/src/etc/init.d/rcS 
b/boards/risc-v/jh7110/star64/src/etc/init.d/rcS
new file mode 100644
index 0000000000..bd202a4b83
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/src/etc/init.d/rcS
@@ -0,0 +1,19 @@
+/****************************************************************************
+ * boards/risc-v/jh7110/star64/src/etc/init.d/rcS
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
diff --git a/boards/risc-v/jh7110/star64/src/jh7110_appinit.c 
b/boards/risc-v/jh7110/star64/src/jh7110_appinit.c
new file mode 100644
index 0000000000..e2668adbe5
--- /dev/null
+++ b/boards/risc-v/jh7110/star64/src/jh7110_appinit.c
@@ -0,0 +1,167 @@
+/****************************************************************************
+ * boards/risc-v/jh7110/star64/src/jh7110_appinit.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <nuttx/board.h>
+#include <nuttx/drivers/ramdisk.h>
+#include <sys/mount.h>
+#include <sys/boardctl.h>
+#include <arch/board/board_memorymap.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Ramdisk Definition */
+
+#define SECTORSIZE   512
+#define NSECTORS(b)  (((b) + SECTORSIZE - 1) / SECTORSIZE)
+#define RAMDISK_DEVICE_MINOR 0
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: mount_ramdisk
+ *
+ * Description:
+ *  Mount a ramdisk defined in the ld.script to /dev/ramX.  The ramdisk is
+ *  intended to contain a romfs with applications which can be spawned at
+ *  runtime.
+ *
+ * Returned Value:
+ *   OK is returned on success.
+ *   -ERRORNO is returned on failure.
+ *
+ ****************************************************************************/
+
+int mount_ramdisk(void)
+{
+  int ret;
+  struct boardioc_romdisk_s desc;
+
+  desc.minor    = RAMDISK_DEVICE_MINOR;
+  desc.nsectors = NSECTORS((ssize_t)__ramdisk_size);
+  desc.sectsize = SECTORSIZE;
+  desc.image    = __ramdisk_start;
+
+  ret = boardctl(BOARDIOC_ROMDISK, (uintptr_t)&desc);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Ramdisk register failed: %s\n", strerror(errno));
+      syslog(LOG_ERR, "Ramdisk mountpoint /dev/ram%d\n",
+             RAMDISK_DEVICE_MINOR);
+      syslog(LOG_ERR, "Ramdisk length %lu, origin %lx\n",
+             (ssize_t)__ramdisk_size, (uintptr_t)__ramdisk_start);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value could be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+  /* Board initialization already performed by board_late_initialize() */
+
+  return OK;
+#else
+  /* Perform board-specific initialization */
+
+#ifdef CONFIG_NSH_ARCHINIT
+
+  mount(NULL, "/proc", "procfs", 0, NULL);
+
+#endif
+
+  return OK;
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize().  board_late_initialize() will
+ *   be called after up_initialize() and board_early_initialize() and just
+ *   before the initial application is started.  This additional
+ *   initialization phase may be used, for example, to initialize board-
+ *   specific device drivers for which board_early_initialize() is not
+ *   suitable.
+ *
+ *   Waiting for events, use of I2C, SPI, etc are permissible in the context
+ *   of board_late_initialize().  That is because board_late_initialize()
+ *   will run on a temporary, internal kernel thread.
+ *
+ ****************************************************************************/
+
+void board_late_initialize(void)
+{
+  /* Mount the RAM Disk */
+
+  mount_ramdisk();
+
+  /* Perform board-specific initialization */
+
+#ifdef CONFIG_NSH_ARCHINIT
+
+  mount(NULL, "/proc", "procfs", 0, NULL);
+
+#endif
+}


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