acassis commented on code in PR #10491:
URL: https://github.com/apache/nuttx/pull/10491#discussion_r1317731913
##########
arch/xtensa/src/esp32s3/Kconfig:
##########
@@ -1026,26 +1076,51 @@ endif # ESP32S3_UART1
if ESP32S3_UART2
+config ESP32S3_UART2_RS485
+ bool "RS-485 on UART2"
+ default n
+ ---help---
+ Enable RS-485 interface on UART2. Your board config will have to
+ provide GPIO_UART2_RS485_DIR pin definition.
+
+config ESP32S3_UART2_RS485_DIR_PIN
+ int "UART2 RS-485 DIR pin"
+ default 27
+ range 0 48
+ depends on ESP32S3_UART2_RS485
+ ---help---
+ DIR pin for RS-485 on UART2. This pin will control the RS485
enable
+ TX of the RS485 transceiver.
+
+config ESP32S3_UART2_RS485_DIR_POLARITY
+ int "UART2 RS-485 DIR pin polarity"
+ default 1
+ range 0 1
+ depends on ESP32S3_UART2_RS485
+ ---help---
+ Polarity of DIR pin for RS-485 on UART2. Set to state on DIR
pin which
+ enables TX (0 - low / nTXEN, 1 - high / TXEN).
+
config ESP32S3_UART2_TXPIN
int "UART2 Tx Pin"
- default 17
+ default 21
range 0 48
config ESP32S3_UART2_RXPIN
int "UART2 Rx Pin"
- default 16
+ default 22
range 0 48
config ESP32S3_UART2_RTSPIN
int "UART2 RTS Pin"
depends on SERIAL_IFLOWCONTROL
- default 35
+ default 23
range 0 48
config ESP32S3_UART2_CTSPIN
int "UART2 CTS Pin"
depends on SERIAL_OFLOWCONTROL
- default 36
+ default 24
Review Comment:
Why to change the default pins?
BTW, for UART0 and UART1 we have "native" pins (pins that don't pass by IO
Matrix, but are select-able over IO MUX), but for UART2 we don't. So any pin
used is fine. I suggest to follow the ESP-IDF definition in this case
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: [email protected]
For queries about this service, please contact Infrastructure at:
[email protected]
