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commit c7e70b6967fad0301cfd796febc4afec472e49c4 Author: qinwei1 <[email protected]> AuthorDate: Tue May 30 14:36:36 2023 +0800 arm64: GoldFish Platform support Summary: Adding virtual evaluate platform GoldFish. Which is based on Android Goldfish Emulator, it's a ARM virt board but Android enhance it with more featue The patch set goldfish as a chip Signed-off-by: qinwei1 <[email protected]> --- arch/arm64/Kconfig | 17 +++ arch/arm64/include/goldfish/chip.h | 92 +++++++++++++++ arch/arm64/include/goldfish/irq.h | 34 ++++++ arch/arm64/src/goldfish/Kconfig | 8 ++ arch/arm64/src/goldfish/Make.defs | 28 +++++ arch/arm64/src/goldfish/chip.h | 42 +++++++ arch/arm64/src/goldfish/goldfish_boot.c | 177 +++++++++++++++++++++++++++++ arch/arm64/src/goldfish/goldfish_boot.h | 81 +++++++++++++ arch/arm64/src/goldfish/goldfish_lowputc.S | 93 +++++++++++++++ arch/arm64/src/goldfish/goldfish_serial.c | 74 ++++++++++++ arch/arm64/src/goldfish/goldfish_serial.h | 58 ++++++++++ 11 files changed, 704 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 6f0ce5711c..d1528a38db 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -53,6 +53,18 @@ config ARCH_CHIP_QEMU ---help--- QEMU virt platform (ARMv8a) +config ARCH_CHIP_GOLDFISH + bool "goldfish platform (ARMv8a)" + select ARCH_CORTEX_A53 + select ARCH_HAVE_MULTICPU + select ARMV8A_HAVE_GICv2 + select ARCH_HAVE_ADDRENV + select ARCH_HAVE_IRQTRIGGER + select ARCH_NEED_ADDRENV_MAPPING + ---help--- + Android GoldFish platform for NuttX (ARMv8a), + based on ARM virt board + config ARCH_CHIP_FVP_ARMV8R bool "ARM FVP virt platform (ARMv8r)" select ARCH_CORTEX_R82 @@ -202,6 +214,7 @@ config ARCH_CHIP default "a64" if ARCH_CHIP_A64 default "rk3399" if ARCH_CHIP_RK3399 default "qemu" if ARCH_CHIP_QEMU + default "goldfish" if ARCH_CHIP_GOLDFISH default "fvp-v8r" if ARCH_CHIP_FVP_ARMV8R default "imx8" if ARCH_CHIP_IMX8 @@ -278,4 +291,8 @@ if ARCH_CHIP_IMX8 source "arch/arm64/src/imx8/Kconfig" endif +if ARCH_CHIP_GOLDFISH +source "arch/arm64/src/goldfish/Kconfig" +endif + endif # ARCH_ARM64 diff --git a/arch/arm64/include/goldfish/chip.h b/arch/arm64/include/goldfish/chip.h new file mode 100644 index 0000000000..173b5194c5 --- /dev/null +++ b/arch/arm64/include/goldfish/chip.h @@ -0,0 +1,92 @@ +/**************************************************************************** + * arch/arm64/include/goldfish/chip.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_INCLUDE_GOLDFISH_CHIP_H +#define __ARCH_ARM64_INCLUDE_GOLDFISH_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Number of bytes in @p x kibibytes/mebibytes/gibibytes */ + +#define KB(x) ((x) << 10) +#define MB(x) (KB(x) << 10) +#define GB(x) (MB(UINT64_C(x)) << 10) + +#if defined(CONFIG_ARCH_CHIP_GOLDFISH) + +/* Addresses and sizes of goldfish (external/qemu/hw/arm/virt.c). + * + * 0x00000000 ~ 0x08000000 (128MB): + * Space for a flash device so we can run bootrom code + * such as UEFI. + * 0x08000000 ~ 0x10000000 (128MB..256MB): + * Used for miscellaneous device I/O (GIC, UART, RTC, + * GPIO, MMIO, FB, AUDIO, PIPE etc) + * 0x10000000 ~ 0x40000000 (256MB..1GB): + * Reserved for possible future PCI support + * 0x40000000 ~ 0x48000000 (1GB up): + * RAM, 128MB, The RAM can be config up to 255GB, but + * it's useless for NuttX + */ + +#if CONFIG_ARM_GIC_VERSION == 2 + +#define CONFIG_GICD_BASE 0x8000000 +#define CONFIG_GICR_BASE 0x8010000 + +#endif /* CONFIG_ARM_GIC_VERSION */ + +#define CONFIG_FLASH_BASEADDR 0x7000000 +#define CONFIG_FLASH_SIZE MB(128) + +#define CONFIG_DEVICEIO_BASEADDR 0x08000000 +#define CONFIG_DEVICEIO_SIZE MB(512) + +#define CONFIG_RAM_ADDR 0x40000000 +#define CONFIG_RAM_SIZE MB(128) + +#define CONFIG_LOAD_BASE 0x40280000 + +#define MPID_TO_CLUSTER_ID(mpid) ((mpid) & ~0xff) + +#endif + +/**************************************************************************** + * Assembly Macros + ****************************************************************************/ + +#ifdef __ASSEMBLY__ + +.macro get_cpu_id xreg0 + mrs \xreg0, mpidr_el1 + ubfx \xreg0, \xreg0, #0, #8 +.endm + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM64_INCLUDE_GOLDFISH_CHIP_H */ diff --git a/arch/arm64/include/goldfish/irq.h b/arch/arm64/include/goldfish/irq.h new file mode 100644 index 0000000000..a7ab171d20 --- /dev/null +++ b/arch/arm64/include/goldfish/irq.h @@ -0,0 +1,34 @@ +/**************************************************************************** + * arch/arm64/include/goldfish/irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* This file should never be included directly but, rather, + * only indirectly through nuttx/irq.h + */ + +#ifndef __ARCH_ARM64_INCLUDE_GOLDFISH_IRQ_H +#define __ARCH_ARM64_INCLUDE_GOLDFISH_IRQ_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NR_IRQS 220 /* Total number of interrupts */ + +#endif /* __ARCH_ARM64_INCLUDE_GOLDFISH_IRQ_H */ diff --git a/arch/arm64/src/goldfish/Kconfig b/arch/arm64/src/goldfish/Kconfig new file mode 100644 index 0000000000..10ebc931e1 --- /dev/null +++ b/arch/arm64/src/goldfish/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_CHIP_GOLDFISH + +endif # ARCH_CHIP_GOLDFISH diff --git a/arch/arm64/src/goldfish/Make.defs b/arch/arm64/src/goldfish/Make.defs new file mode 100644 index 0000000000..fb50c61239 --- /dev/null +++ b/arch/arm64/src/goldfish/Make.defs @@ -0,0 +1,28 @@ +############################################################################ +# arch/arm64/src/qemu/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include common/Make.defs + +# qemu-specific C source files +CHIP_CSRCS = goldfish_boot.c goldfish_serial.c + +ifeq ($(CONFIG_ARCH_EARLY_PRINT),y) +CHIP_ASRCS = goldfish_lowputc.S +endif diff --git a/arch/arm64/src/goldfish/chip.h b/arch/arm64/src/goldfish/chip.h new file mode 100644 index 0000000000..1ee5fbc9ca --- /dev/null +++ b/arch/arm64/src/goldfish/chip.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * arch/arm64/src/goldfish/chip.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_GOLDFISH_CHIP_H +#define __ARCH_ARM64_SRC_GOLDFISH_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#ifndef __ASSEMBLY__ +# include <nuttx/arch.h> +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Macro Definitions + ****************************************************************************/ + +#endif /* __ARCH_ARM64_SRC_GOLDFISH_CHIP_H */ diff --git a/arch/arm64/src/goldfish/goldfish_boot.c b/arch/arm64/src/goldfish/goldfish_boot.c new file mode 100644 index 0000000000..1513c17a2c --- /dev/null +++ b/arch/arm64/src/goldfish/goldfish_boot.c @@ -0,0 +1,177 @@ +/**************************************************************************** + * arch/arm64/src/goldfish/goldfish_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <assert.h> +#include <debug.h> + +#include <nuttx/cache.h> +#ifdef CONFIG_PAGING +# include <nuttx/page.h> +#endif + +#include <arch/chip/chip.h> + +#ifdef CONFIG_SMP +#include "arm64_smp.h" +#endif + +#include "arm64_arch.h" +#include "arm64_internal.h" +#include "arm64_mmu.h" +#include "goldfish_boot.h" +#include "goldfish_serial.h" + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct arm_mmu_region g_mmu_regions[] = +{ + MMU_REGION_FLAT_ENTRY("FLASH_REGION", + CONFIG_FLASH_BASEADDR, CONFIG_FLASH_SIZE, + MT_NORMAL | MT_RO | MT_SECURE), + + MMU_REGION_FLAT_ENTRY("DEVICE_REGION", + CONFIG_DEVICEIO_BASEADDR, CONFIG_DEVICEIO_SIZE, + MT_DEVICE_NGNRNE | MT_RW | MT_SECURE), + + MMU_REGION_FLAT_ENTRY("DRAM0_S0", + CONFIG_RAM_ADDR, CONFIG_RAM_SIZE, + MT_NORMAL | MT_RW | MT_SECURE), +}; + +const struct arm_mmu_config g_mmu_config = +{ + .num_regions = nitems(g_mmu_regions), + .mmu_regions = g_mmu_regions, +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifdef CONFIG_SMP + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_cpu_index + * + * Description: + * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that + * corresponds to the currently executing CPU. + * + * If TLS is enabled, then the RTOS can get this information from the TLS + * info structure. Otherwise, the MCU-specific logic must provide some + * mechanism to provide the CPU index. + * + * Input Parameters: + * None + * + * Returned Value: + * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that + * corresponds to the currently executing CPU. + * + ****************************************************************************/ + +int up_cpu_index(void) +{ + /* Read the Multiprocessor Affinity Register (MPIDR) + * And return the CPU ID field + */ + + return MPID_TO_CORE(GET_MPIDR(), 0); +} + +/**************************************************************************** + * Name: arm64_get_mpid + * + * Description: + * The function from cpu index to get cpu mpid which is reading + * from mpidr_el1 register. Different ARM64 Core will use different + * Affn define, the mpidr_el1 value is not CPU number, So we need + * to change CPU number to mpid and vice versa + * + ****************************************************************************/ + +uint64_t arm64_get_mpid(int cpu) +{ + return CORE_TO_MPID(cpu, 0); +} + +#endif /* CONFIG_SMP */ + +/**************************************************************************** + * Name: arm64_el_init + * + * Description: + * The function called from arm64_head.S at very early stage for these + * platform, it's use to: + * - Handling special hardware initialize routine which is need to + * run at high ELs + * - Initialize system software such as hypervisor or security firmware + * which is need to run at high ELs + * + ****************************************************************************/ + +void arm64_el_init(void) +{ + write_sysreg(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, cntfrq_el0); + + ARM64_ISB(); +} + +/**************************************************************************** + * Name: arm64_chip_boot + * + * Description: + * Complete boot operations started in arm64_head.S + * + ****************************************************************************/ + +void arm64_chip_boot(void) +{ + /* MAP IO and DRAM, enable MMU. */ + + arm64_mmu_init(true); + + /* Perform board-specific device initialization. This would include + * configuration of board specific resources such as GPIOs, LEDs, etc. + */ + + goldfish_board_initialize(); + +#ifdef USE_EARLYSERIALINIT + /* Perform early serial initialization if we are going to use the serial + * driver. + */ + + arm64_earlyserialinit(); +#endif +} diff --git a/arch/arm64/src/goldfish/goldfish_boot.h b/arch/arm64/src/goldfish/goldfish_boot.h new file mode 100644 index 0000000000..08a9d13da3 --- /dev/null +++ b/arch/arm64/src/goldfish/goldfish_boot.h @@ -0,0 +1,81 @@ +/**************************************************************************** + * arch/arm64/src/goldfish/goldfish_boot.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_BOOT_H +#define __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_BOOT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/compiler.h> +#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> +#include <arch/chip/chip.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 62500000 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: goldfish_board_initialize + * + * Description: + * All qemu architectures must provide the following entry point. This + * entry point is called in the initialization phase -- after + * goldfish_memory_initialize and after all memory has been configured and + * mapped but before any devices have been initialized. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void goldfish_board_initialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_BOOT_H */ diff --git a/arch/arm64/src/goldfish/goldfish_lowputc.S b/arch/arm64/src/goldfish/goldfish_lowputc.S new file mode 100644 index 0000000000..0d7527faab --- /dev/null +++ b/arch/arm64/src/goldfish/goldfish_lowputc.S @@ -0,0 +1,93 @@ +/**************************************************************************** + * arch/arm64/src/goldfish/goldfish_lowputc.S + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + **************************************************************************** + * + * DESCRIPTION + * Wrapper for early printk + * + ***************************************************************************/ + +#include <nuttx/config.h> + +#include "arm64_macro.inc" + +/**************************************************************************** + * Public Symbols + ****************************************************************************/ + + .file "goldfish_lowputc.S" + +/**************************************************************************** + * Assembly Macros + ****************************************************************************/ + + /* 32-bit register definition for qemu pl011 uart */ + + #define UART1_BASE_ADDRESS 0x9000000 + #define EARLY_UART_PL011_BAUD_RATE 115200 + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* PL011 UART initialization + */ + +GTEXT(arm64_earlyprintinit) +SECTION_FUNC(text, arm64_earlyprintinit) + /* it's seem we can do nothing at the qemu platform + * for qemu pl011, the QEMU has already initialized UART + */ + ret + +/* PL011 UART wait UART to be ready to transmit + * xb: register which contains the UART base address + * c: scratch register number + */ + +.macro early_uart_ready xb, wt +1: + ldrh \wt, [\xb, #0x18] /* <- UARTFR (Flag register) */ + tst \wt, #0x8 /* Check BUSY bit */ + b.ne 1b /* Wait for the UART to be ready */ +.endm + +/* PL011 UART transmit character + * xb: register which contains the UART base address + * wt: register which contains the character to transmit + */ + +.macro early_uart_transmit xb, wt + strb \wt, [\xb] /* -> UARTDR (Data Register) */ +.endm + +/* Print a character on the UART - this function is called by C + * x0: character to print + */ + +GTEXT(arm64_lowputc) +SECTION_FUNC(text, arm64_lowputc) + ldr x15, =UART1_BASE_ADDRESS + early_uart_ready x15, w2 + early_uart_transmit x15, w0 + ret diff --git a/arch/arm64/src/goldfish/goldfish_serial.c b/arch/arm64/src/goldfish/goldfish_serial.c new file mode 100644 index 0000000000..6eb3191e4f --- /dev/null +++ b/arch/arm64/src/goldfish/goldfish_serial.c @@ -0,0 +1,74 @@ +/*************************************************************************** + * arch/arm64/src/goldfish/goldfish_serial.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ***************************************************************************/ + +/*************************************************************************** + * Included Files + ***************************************************************************/ + +#include <nuttx/config.h> +#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> +#include <unistd.h> +#include <string.h> +#include <assert.h> +#include <errno.h> +#include <debug.h> + +#include <nuttx/serial/uart_pl011.h> + +#include "arm64_internal.h" + +#ifdef USE_SERIALDRIVER +/*************************************************************************** + * Public Functions + ***************************************************************************/ + +/*************************************************************************** + * Name: arm64_earlyserialinit + * + * Description: + * see arm64_internal.h + * + ***************************************************************************/ + +void arm64_earlyserialinit(void) +{ + /* Enable the console UART. The other UARTs will be initialized if and + * when they are first opened. + */ + + pl011_earlyserialinit(); +} + +/*************************************************************************** + * Name: arm64_serialinit + * + * Description: + * see arm64_internal.h + * + ***************************************************************************/ + +void arm64_serialinit(void) +{ + pl011_serialinit(); +} + +#endif /* USE_SERIALDRIVER */ diff --git a/arch/arm64/src/goldfish/goldfish_serial.h b/arch/arm64/src/goldfish/goldfish_serial.h new file mode 100644 index 0000000000..ba773114ed --- /dev/null +++ b/arch/arm64/src/goldfish/goldfish_serial.h @@ -0,0 +1,58 @@ +/**************************************************************************** + * arch/arm64/src/goldfish/goldfish_serial.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_SERIAL_H +#define __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_SERIAL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_GOLDFISH +#define CONFIG_QEMU_UART_BASE 0x9000000 +#define CONFIG_QEMU_UART_IRQ (GIC_SPI_INT_BASE + 1) +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_SERIAL_H */
