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The following commit(s) were added to refs/heads/master by this push: new 8494fd2097 mpfs/mpfs_corespi.c: Round up divider to prevent overlock of SPI 8494fd2097 is described below commit 8494fd2097d853320812b5b151afe3713f535ffa Author: Ville Juven <ville.ju...@unikie.com> AuthorDate: Tue Nov 28 19:09:45 2023 +0200 mpfs/mpfs_corespi.c: Round up divider to prevent overlock of SPI The divider should be rounded to the next full integer to ensure that the resulting SPI frequency is <= target frequency, i.e. the SPI is not overclocked. --- arch/risc-v/src/mpfs/mpfs_corespi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/risc-v/src/mpfs/mpfs_corespi.c b/arch/risc-v/src/mpfs/mpfs_corespi.c index 65c566a6d5..f92ed0123c 100644 --- a/arch/risc-v/src/mpfs/mpfs_corespi.c +++ b/arch/risc-v/src/mpfs/mpfs_corespi.c @@ -543,9 +543,9 @@ static uint32_t mpfs_spi_setfrequency(struct spi_dev_s *dev, priv->frequency = frequency; - /* Formula is SPICLK = PCLK/(2*(CFG_CLK + 1)) */ + /* Formula is SPICLK = PCLK/(2*(CFG_CLK + 1)) (result is rounded up) */ - divider = ((MPFS_FPGA_PERIPHERAL_CLK / frequency) >> 1) - 1; + divider = (MPFS_FPGA_PERIPHERAL_CLK / frequency) >> 1; priv->actual = MPFS_FPGA_PERIPHERAL_CLK / ((divider + 1) << 1); DEBUGASSERT(divider < 256u);