This is an automated email from the ASF dual-hosted git repository. dingyu pushed a commit to branch debug_types in repository https://gitbox.apache.org/repos/asf/incubator-teaclave-sgx-sdk.git
commit 5397089907261f2cf294ed4845828c083596dd66 Author: Yu Ding <[email protected]> AuthorDate: Thu Apr 23 21:37:55 2020 -0700 Add some debug derive --- sgx_types/src/types.rs | 54 +++++++++++++++++++++++++++++--------------------- 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/sgx_types/src/types.rs b/sgx_types/src/types.rs index 4f19136..aa9fdfb 100644 --- a/sgx_types/src/types.rs +++ b/sgx_types/src/types.rs @@ -48,11 +48,13 @@ pub const SGX_XFRM_MPX: uint64_t = 0x0000_0000_0000_0018; // MPX - pub const SGX_XFRM_RESERVED: uint64_t = !(SGX_XFRM_LEGACY | SGX_XFRM_AVX); impl_struct! { + #[derive(Debug)] pub struct sgx_attributes_t { pub flags: uint64_t, pub xfrm: uint64_t, } + #[derive(Debug)] pub struct sgx_misc_attribute_t { pub secs_attr: sgx_attributes_t, pub misc_select: sgx_misc_select_t, @@ -148,7 +150,7 @@ impl_struct_ContiguousMemory! { impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_dh_session_role_t { SGX_DH_SESSION_INITIATOR = 0, SGX_DH_SESSION_RESPONDER = 1, @@ -207,10 +209,12 @@ pub type sgx_config_svn_t = uint16_t; pub type sgx_config_id_t = [uint8_t; SGX_CONFIGID_SIZE]; impl_struct! { + #[derive(Debug)] pub struct sgx_cpu_svn_t { pub svn: [uint8_t; SGX_CPUSVN_SIZE], } + #[derive(Debug)] pub struct sgx_key_id_t { pub id: [uint8_t; SGX_KEYID_SIZE], } @@ -247,7 +251,7 @@ pub type sgx_ra_key_128_t = sgx_key_128bit_t; impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_ra_key_type_t { SGX_RA_KEY_SK = 1, SGX_RA_KEY_MK = 2, @@ -328,7 +332,7 @@ impl_struct! { impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_quote_sign_type_t { SGX_UNLINKABLE_SIGNATURE = 0, SGX_LINKABLE_SIGNATURE = 1, @@ -588,6 +592,7 @@ pub const SGX_RSA3072_PRI_EXP_SIZE: size_t = 384; pub const SGX_RSA3072_PUB_EXP_SIZE: size_t = 4; impl_struct! { + #[derive(Debug)] pub struct sgx_ec256_dh_shared_t { pub s: [uint8_t; SGX_ECP256_KEY_SIZE], } @@ -599,15 +604,18 @@ impl_struct! { } */ + #[derive(Debug)] pub struct sgx_ec256_private_t { pub r: [uint8_t; SGX_ECP256_KEY_SIZE], } + #[derive(Debug)] pub struct sgx_ec256_public_t { pub gx: [uint8_t; SGX_ECP256_KEY_SIZE], pub gy: [uint8_t; SGX_ECP256_KEY_SIZE], } + #[derive(Debug)] pub struct sgx_ec256_signature_t { pub x: [uint32_t; SGX_NISTP_ECP256_KEY_SIZE], pub y: [uint32_t; SGX_NISTP_ECP256_KEY_SIZE], @@ -673,7 +681,7 @@ pub type sgx_aes_ctr_128bit_key_t = [uint8_t; SGX_AESCTR_KEY_SIZE]; impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_generic_ecresult_t { SGX_EC_VALID = 0x0000_0000, /* validation pass successfully */ SGX_EC_COMPOSITE_BASE = 0x0000_0001, /* field based on composite */ @@ -698,7 +706,7 @@ impl_enum! { impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_rsa_result_t { SGX_RSA_VALID = 0, /* validation pass successfully */ SGX_RSA_INVALID_SIGNATURE = 1, /* invalid signature */ @@ -708,7 +716,7 @@ impl_enum! { /* intel sgx sdk 2.1.3 */ impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_rsa_key_type_t { SGX_RSA_PRIVATE_KEY = 0, /* RSA private key state */ SGX_RSA_PUBLIC_KEY = 1, /* RSA public key state */ @@ -858,7 +866,7 @@ pub const EXCEPTION_CONTINUE_EXECUTION: int32_t = -1; impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_exception_vector_t { SGX_EXCEPTION_VECTOR_DE = 0, /* DIV and DIV instructions */ SGX_EXCEPTION_VECTOR_DB = 1, /* For Intel use only */ @@ -873,7 +881,7 @@ impl_enum! { impl_enum!{ #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_exception_type_t { SGX_EXCEPTION_HARDWARE = 3, SGX_EXCEPTION_SOFTWARE = 6, @@ -1065,7 +1073,7 @@ pub const FOPEN_MAX: c_uint = 20; //define in sgx_tprotected_fs.h // impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_device_status_t { SGX_ENABLED = 0, SGX_DISABLED_REBOOT_REQUIRED = 1, /* A reboot is required to finish enabling SGX */ @@ -1093,7 +1101,7 @@ pub const SGX_PCL_GUID: [uint8_t; SGX_PCL_GUID_SIZE] = // impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_uswitchless_worker_type_t { SGX_USWITCHLESS_WORKER_TYPE_UNTRUSTED = 0, SGX_USWITCHLESS_WORKER_TYPE_TRUSTED = 1, @@ -1102,7 +1110,7 @@ impl_enum! { impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_uswitchless_worker_event_t { SGX_USWITCHLESS_WORKER_EVENT_START = 0, /* a worker thread starts */ SGX_USWITCHLESS_WORKER_EVENT_IDLE = 1, /* a worker thread is idle */ @@ -1159,7 +1167,7 @@ pub const PCE_NIST_P256_ECDSA_SHA256: uint8_t = 0; impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_ql_request_policy_t { SGX_QL_PERSISTENT = 0, /* QE is initialized on first use and reused until process ends */ SGX_QL_EPHEMERAL = 1, /* QE is initialized and terminated on every quote. If a previous QE exists, it is stopped & restarted before quoting.*/ @@ -1187,7 +1195,7 @@ impl_struct! { impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_ql_config_version_t { SGX_QL_CONFIG_VERSION_1 = 1, } @@ -1242,7 +1250,7 @@ pub const REF_QUOTE_MAX_AUTHENTICATON_DATA_SIZE: uint16_t = 64; impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_ql_attestation_algorithm_id_t { SGX_QL_ALG_EPID = 0, SGX_QL_ALG_RESERVED_1 = 1, @@ -1254,7 +1262,7 @@ impl_enum! { impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_ql_cert_key_type_t { PPID_CLEARTEXT = 1, PPID_RSA2048_ENCRYPTED = 2, @@ -1374,7 +1382,7 @@ impl_struct_ContiguousMemory! { // impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_ql_path_type_t { SGX_QL_QE3_PATH = 0, SGX_QL_PCE_PATH = 1, @@ -1434,7 +1442,7 @@ impl_enum! { // impl_enum! { #[repr(u32)] - #[derive(Copy, Clone, PartialEq, Eq)] + #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum sgx_qv_path_type_t { SGX_QV_QVE_PATH = 0, SGX_QV_QPL_PATH = 1, @@ -1457,42 +1465,42 @@ pub type sgx_key_256bit_t = [uint8_t; 32]; pub type sgx_mac_256bit_t = [uint8_t; 32]; #[repr(C, align(32))] -#[derive(Copy, Clone, Default)] +#[derive(Debug, Copy, Clone, Default)] pub struct sgx_align_key_128bit_t { _pad: [uint8_t; 16], pub key: sgx_key_128bit_t, } #[repr(C, align(32))] -#[derive(Copy, Clone, Default)] +#[derive(Debug, Copy, Clone, Default)] pub struct sgx_align_mac_128bit_t { _pad: [uint8_t; 16], pub mac: sgx_mac_128bit_t, } #[repr(C, align(64))] -#[derive(Copy, Clone, Default)] +#[derive(Debug, Copy, Clone, Default)] pub struct sgx_align_key_256bit_t { _pad: [uint8_t; 8], pub key: sgx_key_256bit_t, } #[repr(C, align(64))] -#[derive(Copy, Clone, Default)] +#[derive(Debug, Copy, Clone, Default)] pub struct sgx_align_mac_256bit_t { _pad: [uint8_t; 8], pub mac: sgx_mac_256bit_t, } #[repr(C, align(64))] -#[derive(Copy, Clone, Default)] +#[derive(Debug, Copy, Clone, Default)] pub struct sgx_align_ec256_dh_shared_t { _pad: [uint8_t; 8], pub key: sgx_ec256_dh_shared_t, } #[repr(C, align(64))] -#[derive(Copy, Clone, Default)] +#[derive(Debug, Copy, Clone, Default)] pub struct sgx_align_ec256_private_t { _pad: [uint8_t; 8], pub key: sgx_ec256_private_t, --------------------------------------------------------------------- To unsubscribe, e-mail: [email protected] For additional commands, e-mail: [email protected]
