iotamudelta commented on a change in pull request #4342: Add workgroup size
attribute to AMDGPU functions in codegen
URL: https://github.com/apache/incubator-tvm/pull/4342#discussion_r346923874
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File path: src/codegen/llvm/codegen_amdgpu.cc
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@@ -36,13 +36,39 @@
namespace tvm {
namespace codegen {
+namespace {
+
+// calls the device api to get the max threads per block
+static inline int DetectROCMmaxThreadsPerBlock() {
+ TVMContext tvm_ctx;
+ tvm_ctx.device_type = kDLROCM;
+ tvm_ctx.device_id = 0;
+ tvm::runtime::DeviceAPI* api = tvm::runtime::DeviceAPI::Get(tvm_ctx, true);
+ if (api != nullptr) {
+ TVMRetValue val;
+ api->GetAttr(tvm_ctx, tvm::runtime::kExist, &val);
+ if (val.operator int() == 1) {
+ tvm::runtime::DeviceAPI::Get(tvm_ctx)->
+ GetAttr(tvm_ctx, tvm::runtime::kMaxThreadsPerBlock, &val);
+ return val.operator int();
+ }
+ }
+ LOG(WARNING) << "Cannot get maximum number of threads for AMD codegen";
+ return 1024;
Review comment:
No. As said, NV doesn't have this issue since they compile to PTX IR and any
__launch_bounds__ annotation is simply a performance optimization. This is
independent of HIP - if you want to use a work group size >256, you must tell
LC about it. __launch_bounds__ is the way to do it for HIP source kernels,
there are obviously equivalent processes along to stack to get said information
to LC.
There is nothing inherently unstable with our HW with work group sizes >256
- you simply must use it correctly.
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