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The following commit(s) were added to refs/heads/master by this push:
new 86dcb1e Added declare of aluBits for TensorAlu (#4624)
86dcb1e is described below
commit 86dcb1e4dcae01f9863b10a14d5d1214e426ee17
Author: Kevin Yuan <[email protected]>
AuthorDate: Mon Jan 6 08:56:16 2020 +0800
Added declare of aluBits for TensorAlu (#4624)
---
vta/hardware/chisel/src/main/scala/core/TensorAlu.scala | 1 +
1 file changed, 1 insertion(+)
diff --git a/vta/hardware/chisel/src/main/scala/core/TensorAlu.scala
b/vta/hardware/chisel/src/main/scala/core/TensorAlu.scala
index 6f1a804..21e57f2 100644
--- a/vta/hardware/chisel/src/main/scala/core/TensorAlu.scala
+++ b/vta/hardware/chisel/src/main/scala/core/TensorAlu.scala
@@ -108,6 +108,7 @@ class AluVector(implicit p: Parameters) extends Module {
* acc-scratchpad.
*/
class TensorAlu(debug: Boolean = false)(implicit p: Parameters) extends Module
{
+ val aluBits = p(CoreKey).accBits
val io = IO(new Bundle {
val start = Input(Bool())
val done = Output(Bool())
