Lunderberg commented on PR #104: URL: https://github.com/apache/tvm-rfcs/pull/104#issuecomment-1751100613
> What I'm aiming at is to be able to lower the TIR to a generic CPU, that is to an architecture that does not support SVE. The TIR will need to have some default lowering in CodeGenLLVM/CodeGenCPU, so being able to do that is important. Could it instead be in a target-dependent lowering pass? That is, since a lowering pass after `BindTarget` ([here](https://github.com/apache/tvm/blob/main/src/driver/driver_api.cc#L573) in `driver_api.cc`) would know whether the target CPU supports SVE or not, we could make a pass that either returns the IRModule unmodified for CPUs that support SVE, or converts it to non-SVE instructions otherwise. I'd like to avoid adding more complexity to the `CodeGenLLVM` and `CodeGenCPU` steps, as it is more difficult to test than IRModule to IRModule transformations. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
