cbalint13 commented on PR #16347: URL: https://github.com/apache/tvm/pull/16347#issuecomment-1877114585
> 1. `tir.split` can accept an expression with vscale as a factor > 2. `LoopVectorizer` can create `Ramp` and `Broadcast` nodes with scalable lanes > 3. `BufferLoad` and `BufferStore` nodes can accept an optional predicate which is created in `LoopVectorizer` > 4. LLVM codegen can lower the scalable predicated vectors into `llvm.masked.*` intrinsics > > The prototype is currently missing `tir.tile` and TVMScript parser support for predicates. Hi @ekalda , Very nice work ! I can't comment much, I think this implementation is a careful step toward SVE. Will test this on some RVV CPU implementation to see a walk through the LLVM masked.* things. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
