LeiWang1999 commented on code in PR #17133:
URL: https://github.com/apache/tvm/pull/17133#discussion_r1705376695
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src/tir/transforms/lower_cross_thread_reduction.cc:
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@@ -120,12 +131,7 @@ bool IsReductionBlock(const BlockRealize& realize, const
Map<Var, Range>& loop_r
if (!ContainsOnlyDataParAndReductionBlockIter(block->iter_vars)) {
return false;
}
- // Cond 4. Dominant: the block is the only writer of its output, dominating
the reader of its
- // output buffers.
- if (!IsDominantBlock(scope_block, GetRef<Block>(block))) {
- return false;
- }
Review Comment:
@wrongtest-intellif Thanks for your review, I'll take a look and give you
response this Friday.
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