anijain2305 opened a new issue #5340: Schedule Transferability between Intel 
and ARM CPU targets
URL: https://github.com/apache/incubator-tvm/issues/5340
 
 
   Relevant discuss post - 
https://discuss.tvm.ai/t/topi-using-x86-schedules-for-arm-conv2d/6365
   
   Currently, TVM has different schedules for ARM and Intel for conv2d 
operators. The discuss post listed above shows that Intel NCHWc schedule on ARM 
performs better end-to-end latency compared to ARM NCHWC conv2d spatial pack 
for many TFLite networks. 
   
   However, this is just one opportunity and there are also some more ideas 
that we should pursue. This issue lists those potential issues and anybody 
interested can pick them up. This list is a result of discussions from the 
above post.
   
   - [ ] Try ARM winograd NCHW schedule on Intel servers
   - [ ] Write NCHWc winograd for Intel servers to comply with existing NCHWc 
data layout ([PR](https://github.com/apache/incubator-tvm/pull/2111))
   - [ ] Work on NHWC ARM schedule - tuning and optimization - work started by 
@jackwish
   - [ ] Investigate NHWC vs NCHWc schedule - NCHWc can bring data layouts 
transform. Check if NHWC can achieve same performance as NCHWc data layout.
   
   @FrozenGene @masahi @tqchen 

----------------------------------------------------------------
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
 
For queries about this service, please contact Infrastructure at:
[email protected]


With regards,
Apache Git Services

Reply via email to