fzi-peccia commented on code in PR #18182:
URL: https://github.com/apache/tvm/pull/18182#discussion_r2282155809
##########
python/tvm/target/target.py:
##########
@@ -637,6 +637,18 @@ def riscv_cpu(model="sifive-u54", options=None):
"-mabi=lp64d",
# cc: riscv64-unknown-linux-gnu-g++ -march=rv64gc -mabi=lp64d
-mcpu=sifive-u74
],
+ "bpi-f3": [
+ # "-model=sifive-u74",
+ "-mtriple=riscv64-unknown-linux-gnu",
+ "-mcpu=generic",
+ # "-march=rv64gcv_zvl256b",
+ # "-mcpu=generic-rv64",
+ "-mfloat-abi=hard",
+ "-num-cores=8",
+ "-mabi=lp64d",
+ "-mattr=+v,+zvl256b",
+ # cc: riscv64-unknown-linux-gnu-g++ -march=rv64gc -mabi=lp64d
-mcpu=generic -mattr=+v
+ ],
Review Comment:
I was not familiar with other boards based around the same core. We could of
course change it to something more meaningful, if there are multiple boards
around the same core.
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