This is an automated email from the ASF dual-hosted git repository.
github-bot pushed a change to branch nightly
in repository https://gitbox.apache.org/repos/asf/tvm.git
from c6b3feac48 [CI] Update images to `20260214-152058-2a448ce4` (#18775)
add 4d4351dd68 [DOC] Fix various grammar and punctuation issues (#18790)
add bcd716bb8c [DOC] Fix various RST issues (#18789)
add 0460d82169 [REFACTOR][TARGET] Cleanup target config (#18788)
add e49f50b00d [RELAX] Improve well-formed checker error messages with
function names (#18791)
add 283fd19683 [REFACTOR][TARGET] Further cleanup target python api
(#18793)
add 8057a76d5c [CI] Update actions to latest and move to full commit SHA
pinning (#18792)
add 993c785bad [ONNX] Handle Gelu approximate attribute from Opset 20
(#18773)
No new revisions were added by this update.
Summary of changes:
.github/actions/setup/action.yml | 6 +-
.github/workflows/cc_bot.yml | 2 +-
.github/workflows/main.yml | 4 +-
.github/workflows/nightly_docker_update.yml | 2 +-
.github/workflows/ping_reviewers.yml | 2 +-
.github/workflows/tag_teams.yml | 2 +-
.github/workflows/tvmbot.yml | 2 +-
.../workflows/update_last_successful_branch.yml | 2 +-
.github/workflows/update_nightly_branch.yml | 2 +-
CMakeLists.txt | 3 +-
docs/arch/device_target_interactions.rst | 12 +-
docs/arch/index.rst | 6 +-
docs/arch/introduction_to_module_serialization.rst | 4 +-
docs/arch/pass_infra.rst | 2 +-
docs/contribute/ci.rst | 8 +-
docs/contribute/code_guide.rst | 2 +-
docs/contribute/document.rst | 6 +-
docs/contribute/git_howto.rst | 2 +-
.../relax/tutorials/relax_transformation.py | 2 +-
docs/reference/api/links.rst | 2 +-
include/tvm/ir/config_schema.h | 235 +++++++
include/tvm/target/tag.h | 7 +
include/tvm/target/target.h | 67 +-
include/tvm/target/target_kind.h | 176 +-----
python/tvm/contrib/hexagon/pytest_plugin.py | 2 +-
python/tvm/contrib/nvcc.py | 7 +-
python/tvm/contrib/thrust.py | 9 +-
python/tvm/relax/frontend/nn/llm/kv_cache.py | 2 +-
python/tvm/relax/frontend/onnx/onnx_frontend.py | 16 +-
python/tvm/relax/frontend/torch/dynamo.py | 2 +-
python/tvm/s_tir/dlight/gpu/gemv.py | 4 +-
python/tvm/s_tir/dlight/gpu/low_batch_gemv.py | 4 +-
python/tvm/s_tir/dlight/gpu/matmul.py | 2 +-
.../schedule/cuda/layout_transform.py | 4 +-
python/tvm/target/__init__.py | 68 +-
python/tvm/target/compilation_config.py | 27 -
python/tvm/target/tag.py | 67 +-
.../{contrib => target/tag_registry}/__init__.py | 17 +-
python/tvm/target/tag_registry/adreno.py | 63 ++
python/tvm/target/tag_registry/arm_cpu.py | 116 ++++
.../tvm/target/tag_registry/aws_cpu.py | 52 +-
python/tvm/target/tag_registry/cuda.py | 373 +++++++++++
python/tvm/target/tag_registry/hexagon.py | 55 ++
.../tag_registry/metal.py} | 39 +-
.../target/{tag.py => tag_registry/registry.py} | 20 +-
python/tvm/target/tag_registry/riscv_cpu.py | 72 +++
python/tvm/target/target.py | 702 +--------------------
python/tvm/tir/build.py | 6 +-
python/tvm/topi/gpu/scan.py | 4 +-
python/tvm/topi/gpu/sort.py | 6 +-
python/tvm/topi/math.py | 6 +-
src/arith/scalable_expression.cc | 2 +-
src/relax/analysis/well_formed.cc | 28 +-
src/s_tir/meta_schedule/database/database.cc | 2 +-
.../space_generator/space_generator.cc | 10 +-
src/script/printer/ir/ir.cc | 2 +-
src/script/printer/tir/ir.cc | 2 +-
.../llvm/arm_aprofile.cc} | 41 +-
.../llvm/arm_aprofile.h} | 20 +-
.../llvm/arm_mprofile.cc} | 32 +-
.../llvm/arm_mprofile.h} | 20 +-
.../cpu.cc => canonicalizer/llvm/canonicalize.cc} | 20 +-
.../cpu.h => canonicalizer/llvm/canonicalize.h} | 20 +-
src/target/llvm/llvm_instance.cc | 5 +-
src/target/llvm/llvm_instance.h | 2 +-
src/target/source/codegen_opencl.cc | 4 +-
src/target/spirv/codegen_spirv.cc | 2 +
src/target/tag.cc | 409 +-----------
src/target/target.cc | 347 +++-------
src/target/target_kind.cc | 110 ++--
src/target/virtual_device.cc | 6 +-
tests/cpp/config_schema_test.cc | 323 ++++++++++
.../cpp/target/canonicalizer/arm_aprofile_test.cc | 415 ++++++++++++
.../cpp/target/canonicalizer/arm_mprofile_test.cc | 206 ++++++
tests/cpp/target/parsers/aprofile_test.cc | 447 -------------
tests/cpp/target/parsers/mprofile_test.cc | 219 -------
tests/cpp/target_test.cc | 31 +-
tests/python/arith/test_arith_simplify.py | 9 +-
tests/python/codegen/test_target_codegen_cuda.py | 4 +-
.../python/codegen/test_target_codegen_hexagon.py | 16 +-
tests/python/codegen/test_target_codegen_vulkan.py | 2 +-
.../python/contrib/test_hexagon/infrastructure.py | 22 +-
.../test_hexagon/test_async_dma_pipeline.py | 2 +-
.../contrib/test_hexagon/test_dma_builtin.py | 2 +-
.../test_relax_2d_buffer_allocation.py | 2 +-
.../contrib/test_hexagon/test_relax_integration.py | 4 +-
tests/python/relax/backend/clml/utils.py | 4 +-
tests/python/relax/test_frontend_onnx.py | 8 +
tests/python/relax/texture/adreno_utils.py | 11 +-
...ule_postproc_disallow_async_strided_mem_copy.py | 2 +-
...est_meta_schedule_postproc_verify_vtcm_limit.py | 7 +-
.../test_meta_schedule_schedule_rule_mlt.py | 4 +-
tests/python/target/test_target_target.py | 169 ++---
tests/python/target/test_x86_features.py | 4 +-
94 files changed, 2489 insertions(+), 2811 deletions(-)
create mode 100644 include/tvm/ir/config_schema.h
delete mode 100644 python/tvm/target/compilation_config.py
copy python/tvm/{contrib => target/tag_registry}/__init__.py (64%)
create mode 100644 python/tvm/target/tag_registry/adreno.py
create mode 100644 python/tvm/target/tag_registry/arm_cpu.py
copy tests/python/runtime/test_runtime_device_api.py =>
python/tvm/target/tag_registry/aws_cpu.py (51%)
create mode 100644 python/tvm/target/tag_registry/cuda.py
create mode 100644 python/tvm/target/tag_registry/hexagon.py
copy python/tvm/{relax/transform/legalize_ops/adreno/convolution.py =>
target/tag_registry/metal.py} (53%)
copy python/tvm/target/{tag.py => tag_registry/registry.py} (84%)
create mode 100644 python/tvm/target/tag_registry/riscv_cpu.py
rename src/target/{parsers/aprofile.cc => canonicalizer/llvm/arm_aprofile.cc}
(78%)
rename src/target/{parsers/aprofile.h => canonicalizer/llvm/arm_aprofile.h}
(65%)
rename src/target/{parsers/mprofile.cc => canonicalizer/llvm/arm_mprofile.cc}
(77%)
rename src/target/{parsers/mprofile.h => canonicalizer/llvm/arm_mprofile.h}
(65%)
rename src/target/{parsers/cpu.cc => canonicalizer/llvm/canonicalize.cc} (84%)
rename src/target/{parsers/cpu.h => canonicalizer/llvm/canonicalize.h} (67%)
create mode 100644 tests/cpp/config_schema_test.cc
create mode 100644 tests/cpp/target/canonicalizer/arm_aprofile_test.cc
create mode 100644 tests/cpp/target/canonicalizer/arm_mprofile_test.cc
delete mode 100644 tests/cpp/target/parsers/aprofile_test.cc
delete mode 100644 tests/cpp/target/parsers/mprofile_test.cc
