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tqchen pushed a commit to branch main
in repository https://gitbox.apache.org/repos/asf/tvm-tirx.git
The following commit(s) were added to refs/heads/main by this push:
new c20448f23 Remove blanket MSVC warning disables and fix narrowing
conversions (#59)
c20448f23 is described below
commit c20448f231c40eec2ccf547a4b858883ad234dfa
Author: Tianqi Chen <[email protected]>
AuthorDate: Sun Oct 25 10:02:41 2026 -0400
Remove blanket MSVC warning disables and fix narrowing conversions (#59)
TIRx's directory-wide MSVC warning disables hide project and dependency
diagnostics. Remove the eleven blanket disables and fix conversion
warnings with local casts and matching integer types while retaining the
original arithmetic and control flow. Preserve full logging positions,
identify main-thread failures correctly, and mark the existing throwing
layout fallback unreachable for compiler control-flow analysis.
---
CMakeLists.txt | 3 +--
src/backend/cuda/launch/launch_plan.h | 2 +-
src/backend/cuda/transform/lower_iket.cc | 4 ++--
src/backend/hexagon/codegen/llvm/codegen_hexagon.cc | 6 +++---
src/codegen/llvm/codegen_cpu.cc | 6 +++---
src/codegen/llvm/codegen_llvm.cc | 21 +++++++++++----------
src/codegen/llvm/codegen_llvm.h | 2 +-
src/codegen/llvm/codegen_x86_64.cc | 8 +++++---
src/codegen/llvm/llvm_instance.cc | 2 +-
src/runtime/logging.cc | 8 ++++----
src/runtime/thread_pool.cc | 6 +++---
src/runtime/threading_backend.cc | 2 +-
src/script/ir_builder/ir.cc | 2 +-
src/script/printer/doc_printer.cc | 6 +++---
src/sym/int_set.cc | 20 ++++++++++----------
src/tirx/ir/index_map.cc | 2 +-
src/tirx/ir/ir_mutator_with_analyzer.cc | 4 ++--
src/tirx/ir/layout/layout.cc | 1 +
src/tirx/ir/layout/utils.cc | 2 +-
src/tirx/transform/lower_thread_allreduce.cc | 12 ++++++------
src/tirx/transform/split_host_device.cc | 2 +-
src/tirx/transform/tvm_ffi_binder.cc | 6 +++---
22 files changed, 65 insertions(+), 62 deletions(-)
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 515091b38..d9f965638 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -108,8 +108,7 @@
include_directories("${CMAKE_CURRENT_SOURCE_DIR}/3rdparty/compiler-rt")
if(MSVC)
add_compile_definitions(WIN32_LEAN_AND_MEAN _CRT_SECURE_NO_WARNINGS
_SCL_SECURE_NO_WARNINGS _ENABLE_EXTENDED_ALIGNED_STORAGE NOMINMAX)
- add_compile_options(/EHsc /MP /bigobj /permissive-
- /wd4244 /wd4267 /wd4018 /wd4316 /wd4101 /wd4180 /wd4251 /wd4624 /wd4146
/wd4141 /wd4068)
+ add_compile_options(/EHsc /MP /bigobj /permissive-)
else()
add_compile_options(-Wall)
endif()
diff --git a/src/backend/cuda/launch/launch_plan.h
b/src/backend/cuda/launch/launch_plan.h
index 0a73d96f0..289b455a5 100644
--- a/src/backend/cuda/launch/launch_plan.h
+++ b/src/backend/cuda/launch/launch_plan.h
@@ -107,7 +107,7 @@ class PackedLaunchPlan {
values.SetInt(operand.field, operand.constant);
continue;
}
- auto arg = args[kernel_args + operand.index];
+ auto arg = args[static_cast<int>(kernel_args + operand.index)];
switch (kFields[static_cast<size_t>(operand.field)].kind) {
case ValueKind::kInteger:
values.SetInt(operand.field, arg.cast<int64_t>());
diff --git a/src/backend/cuda/transform/lower_iket.cc
b/src/backend/cuda/transform/lower_iket.cc
index 7445a768e..dae1cdadb 100644
--- a/src/backend/cuda/transform/lower_iket.cc
+++ b/src/backend/cuda/transform/lower_iket.cc
@@ -777,7 +777,7 @@ extern "C" {
key.kind == DeclarationKind::kRange ? 4 : (key.kind ==
DeclarationKind::kPush ? 1 : 0);
PutOfficialU32(&event, 16, event_position);
PutOfficialU32(&event, 20, range_id);
- PutOfficialU32(&event, 24, key.name.size());
+ PutOfficialU32(&event, 24, static_cast<uint32_t>(key.name.size()));
std::copy(key.name.begin(), key.name.end(), event.begin() + 28);
std::string event_symbol = "__iket_evt_decl_" +
OfficialSymbolName(key.name) + "_" +
std::to_string(declaration.event_id) + "_attrs";
@@ -791,7 +791,7 @@ extern "C" {
PutOfficialU32(&range, 12, 0xffffffffU);
PutOfficialU32(&range, 16, key.kind == DeclarationKind::kRange ? 1 : 2);
PutOfficialU32(&range, 20, key.kind == DeclarationKind::kRange ? 1 : 0);
- PutOfficialU32(&range, 32, key.name.size());
+ PutOfficialU32(&range, 32, static_cast<uint32_t>(key.name.size()));
std::copy(key.name.begin(), key.name.end(), range.begin() + 36);
std::string range_symbol = "__iket_range_decl_" +
OfficialSymbolName(key.name) + "_" +
std::to_string(range_id) + "_attrs";
diff --git a/src/backend/hexagon/codegen/llvm/codegen_hexagon.cc
b/src/backend/hexagon/codegen/llvm/codegen_hexagon.cc
index d7959ce90..54539f7b1 100644
--- a/src/backend/hexagon/codegen/llvm/codegen_hexagon.cc
+++ b/src/backend/hexagon/codegen/llvm/codegen_hexagon.cc
@@ -292,7 +292,7 @@ llvm::Value* CodeGenHexagon::Intrinsic(llvm::Intrinsic::ID
IntID,
llvm::FunctionType* intf_type = intf->getFunctionType();
TVM_FFI_ICHECK(args.size() == intf_type->getNumParams());
- for (int i = 0, e = args.size(); i != e; ++i) {
+ for (int i = 0, e = static_cast<int>(args.size()); i != e; ++i) {
llvm::Value* arg = args[i];
auto* need_type =
llvm::dyn_cast<llvm::VectorType>(intf_type->getParamType(i));
auto* have_type = llvm::dyn_cast<llvm::VectorType>(arg->getType());
@@ -417,7 +417,7 @@ void ProcessLLVMOptions(const std::vector<std::string>&
llvm_vec) {
std::mem_fn(&std::string::c_str));
const char** args = &starts.front();
- llvm::cl::ParseCommandLineOptions(llvm_vec.size(), args);
+ llvm::cl::ParseCommandLineOptions(static_cast<int>(llvm_vec.size()), args);
}
} // namespace
@@ -444,7 +444,7 @@ ffi::Module BuildHexagon(IRModule mod, Target target) {
for (const ffi::String& s : llvm_options.value()) llvm_options_str += ","
+ s;
}
// Postprocess the LLVM options string: replace '@' with '=', and ',' with '
'.
- for (int i = 0, e = llvm_options_str.size(); i != e; ++i) {
+ for (size_t i = 0, e = llvm_options_str.size(); i != e; ++i) {
switch (llvm_options_str[i]) {
case '@':
llvm_options_str[i] = '=';
diff --git a/src/codegen/llvm/codegen_cpu.cc b/src/codegen/llvm/codegen_cpu.cc
index 93f1961ee..2f00189f1 100644
--- a/src/codegen/llvm/codegen_cpu.cc
+++ b/src/codegen/llvm/codegen_cpu.cc
@@ -592,7 +592,7 @@ void CodeGenCPU::CreateComputeScope(const RegionStmtObj*
op) {
if ((var->ty.as<PtrTypeObj>() || var->ty.as<TensorTypeObj>()) &&
!alias_var_set_.count(var.get())) {
// set non alias.
- fcompute->addParamAttr(idx, llvm::Attribute::NoAlias);
+ fcompute->addParamAttr(static_cast<unsigned>(idx),
llvm::Attribute::NoAlias);
// always not inline compute function to make the code structure clean
fcompute->addFnAttr(llvm::Attribute::NoInline);
}
@@ -602,7 +602,7 @@ void CodeGenCPU::CreateComputeScope(const RegionStmtObj*
op) {
unsigned align = f->second.alignment;
if (align > 1) {
auto attr = llvm::Attribute::get(*ctx, llvm::Attribute::Alignment,
align);
- fcompute->addParamAttr(idx, attr);
+ fcompute->addParamAttr(static_cast<unsigned>(idx), attr);
}
}
}
@@ -655,7 +655,7 @@ CodeGenLLVM::TypedPointer CodeGenCPU::PackClosureData(const
ffi::Array<Var>& vfi
void CodeGenCPU::UnpackClosureData(TypedPointer cdata, const ffi::Array<Var>&
vfields,
std::unordered_map<const VarObj*,
llvm::Value*>* vmap) {
for (size_t i = 0; i < vfields.size(); ++i) {
- llvm::Type* field_type = cdata.type->getStructElementType(i);
+ llvm::Type* field_type =
cdata.type->getStructElementType(static_cast<unsigned>(i));
llvm::Value* field_addr =
builder_->CreateInBoundsGEP(cdata.type, cdata.addr, {ConstInt32(0),
ConstInt32(i)});
llvm::Value* load = builder_->CreateLoad(field_type, field_addr,
std::string(vfields[i]->name));
diff --git a/src/codegen/llvm/codegen_llvm.cc b/src/codegen/llvm/codegen_llvm.cc
index 013c1c9f6..e1b4541c2 100644
--- a/src/codegen/llvm/codegen_llvm.cc
+++ b/src/codegen/llvm/codegen_llvm.cc
@@ -39,6 +39,7 @@
#include <tvm/tirx/op/region.h>
#include <tvm/tirx/op/vector.h>
#include <tvm/tirx/stmt.h>
+
#if LLVM_VERSION_MAJOR >= 17
#include <llvm/TargetParser/Triple.h>
#else
@@ -360,7 +361,7 @@ void CodeGenLLVM::AddFunctionInternal(const GlobalVar&
gvar, const Function& f)
if (is_restricted_) {
if (var->ty.as<PtrTypeObj>() && !alias_var_set_.count(var.get())) {
// set non alias.
- function_->addParamAttr(i, llvm::Attribute::NoAlias);
+ function_->addParamAttr(static_cast<unsigned>(i),
llvm::Attribute::NoAlias);
}
}
}
@@ -844,19 +845,19 @@ llvm::Value*
CodeGenLLVM::CreateVecConcat(std::vector<llvm::Value*> vecs) {
for (size_t i = 0; i < vecs.size() - 1; i += 2) {
llvm::Value* lhs = vecs[i];
llvm::Value* rhs = vecs[i + 1];
- const size_t lhs_lanes = GetVectorNumElements(lhs);
- const size_t rhs_lanes = GetVectorNumElements(rhs);
+ const int lhs_lanes = GetVectorNumElements(lhs);
+ const int rhs_lanes = GetVectorNumElements(rhs);
if (lhs_lanes < rhs_lanes) {
lhs = CreateVecPad(lhs, rhs_lanes);
} else if (rhs_lanes < lhs_lanes) {
rhs = CreateVecPad(rhs, lhs_lanes);
}
- const size_t shared_lanes = std::max(lhs_lanes, rhs_lanes);
+ const int shared_lanes = std::max(lhs_lanes, rhs_lanes);
std::vector<int> mask;
- for (size_t i = 0; i < lhs_lanes; ++i) {
+ for (int i = 0; i < lhs_lanes; ++i) {
mask.push_back(i);
}
- for (size_t i = 0; i < rhs_lanes; ++i) {
+ for (int i = 0; i < rhs_lanes; ++i) {
mask.push_back(shared_lanes + i);
}
new_vecs.push_back(builder_->CreateShuffleVector(lhs, rhs, mask));
@@ -2057,19 +2058,19 @@ llvm::Value* CodeGenLLVM::Dispatch_(const
prim::RampObj* op) {
llvm::Value* CodeGenLLVM::Dispatch_(const prim::ShuffleObj* op) {
std::vector<llvm::Value*> vecs(op->vectors.size());
int total_lanes = 0;
- for (int i = 0, e = op->vectors.size(); i < e; ++i) {
+ for (size_t i = 0, e = op->vectors.size(); i < e; ++i) {
vecs[i] = Dispatch(op->vectors[i]);
total_lanes += PrimType(op->vectors[i].ty()->dtype).lanes();
}
llvm::Value* v0 = CreateVecConcat(vecs);
std::vector<uint32_t> idx(op->indices.size());
- for (int i = 0, e = op->indices.size(); i < e; ++i) {
+ for (size_t i = 0, e = op->indices.size(); i < e; ++i) {
const auto* imm = op->indices[i].as<IntImmObj>();
auto val = imm ? imm->value.as<int64_t>() : std::nullopt;
TVM_FFI_ICHECK(val.has_value() && *val >= 0 && *val < total_lanes)
<< "Shuffled indeces are suppose to be int, "
<< "but get " << op->indices[i] << "\n";
- idx[i] = *val;
+ idx[i] = static_cast<uint32_t>(*val);
}
llvm::Value* mask = llvm::ConstantDataVector::get(builder_->getContext(),
idx);
auto res = builder_->CreateShuffleVector(v0,
llvm::UndefValue::get(v0->getType()), mask);
@@ -2440,7 +2441,7 @@ void CodeGenLLVM::AddDebugInformation(llvm::Function*
f_llvm,
TVM_FFI_ICHECK_EQ(f_llvm->arg_size(), tvm_param_types.size());
for (auto iter_param = f_llvm->arg_begin(); iter_param != f_llvm->arg_end();
iter_param++) {
- size_t i = std::distance(f_llvm->arg_begin(), iter_param);
+ unsigned i = iter_param->getArgNo();
auto* paramAlloca = builder.CreateAlloca(iter_param->getType());
auto param = dbg_info_->di_builder_->createParameterVariable(
diff --git a/src/codegen/llvm/codegen_llvm.h b/src/codegen/llvm/codegen_llvm.h
index 82a44cc16..9d0541297 100644
--- a/src/codegen/llvm/codegen_llvm.h
+++ b/src/codegen/llvm/codegen_llvm.h
@@ -645,7 +645,7 @@ class CodeGenLLVM : public
tvm::ExprFunctor<llvm::Value*(const Expr&)>,
};
inline int CodeGenLLVM::GetVectorNumElements(llvm::Value* vec) {
- return llvm::cast<llvm::FixedVectorType>(vec->getType())->getNumElements();
+ return
static_cast<int>(llvm::cast<llvm::FixedVectorType>(vec->getType())->getNumElements());
}
template <typename IterType, typename ConvType>
diff --git a/src/codegen/llvm/codegen_x86_64.cc
b/src/codegen/llvm/codegen_x86_64.cc
index 445e1f32b..85a485a7a 100644
--- a/src/codegen/llvm/codegen_x86_64.cc
+++ b/src/codegen/llvm/codegen_x86_64.cc
@@ -104,15 +104,17 @@ llvm::Value*
CodeGenX86_64::CallVectorIntrin(llvm::Intrinsic::ID id, size_t intr
for (const auto& v : args) {
if (v->getType()->isVectorTy()) {
TVM_FFI_ICHECK_EQ(GetVectorNumElements(v), num_elems);
- split_args.push_back(CreateVecSlice(v, i, intrin_lanes));
+ split_args.push_back(
+ CreateVecSlice(v, static_cast<int>(i),
static_cast<int>(intrin_lanes)));
} else {
split_args.push_back(v);
}
}
- llvm::Type* type = llvm::FixedVectorType::get(result_ty->getScalarType(),
intrin_lanes);
+ llvm::Type* type =
+ llvm::FixedVectorType::get(result_ty->getScalarType(),
static_cast<unsigned>(intrin_lanes));
split_results.push_back(CallVectorIntrin(id, intrin_lanes, type,
split_args));
}
- return CreateVecSlice(CreateVecConcat(split_results), 0, num_elems);
+ return CreateVecSlice(CreateVecConcat(split_results), 0,
static_cast<int>(num_elems));
}
TVM_FFI_STATIC_INIT_BLOCK() {
diff --git a/src/codegen/llvm/llvm_instance.cc
b/src/codegen/llvm/llvm_instance.cc
index a17e92ce8..8c8a5e440 100644
--- a/src/codegen/llvm/llvm_instance.cc
+++ b/src/codegen/llvm/llvm_instance.cc
@@ -644,7 +644,7 @@ LLVMTargetInfo::Option
LLVMTargetInfo::ParseOptionString(const std::string& str)
// After breaking up the option string, examine and validate the individual
// parts.
- int part_this = 0, part_end = parts.size();
+ size_t part_this = 0, part_end = parts.size();
const std::string error_header = "while parsing option \"" + str + "\": ";
diff --git a/src/runtime/logging.cc b/src/runtime/logging.cc
index 847d9b127..f5d12df0c 100644
--- a/src/runtime/logging.cc
+++ b/src/runtime/logging.cc
@@ -70,14 +70,14 @@ TvmLogDebugSettings TvmLogDebugSettings::ParseSpec(const
char* opt_spec) {
return settings;
}
std::istringstream spec_stream(spec);
- auto tell_pos = [&](const std::string& last_read) {
- int pos = spec_stream.tellg();
+ auto tell_pos = [&](const std::string& last_read) -> std::string::size_type {
+ std::streampos pos = spec_stream.tellg();
if (pos == -1) {
LOG(INFO) << "override pos: " << last_read;
// when pos == -1, failbit was set due to std::getline reaching EOF
without seeing delimiter.
- pos = spec.size() - last_read.size();
+ return spec.size() - last_read.size();
}
- return pos;
+ return static_cast<std::string::size_type>(pos);
};
while (spec_stream) {
std::string name;
diff --git a/src/runtime/thread_pool.cc b/src/runtime/thread_pool.cc
index 8ee52765e..dcacee30d 100644
--- a/src/runtime/thread_pool.cc
+++ b/src/runtime/thread_pool.cc
@@ -316,7 +316,7 @@ class ThreadPool {
if ((*tsk.launcher->flambda)(0, penv, cdata) == 0) {
tsk.launcher->SignalJobFinish();
} else {
- tsk.launcher->SignalJobError(tsk.task_id);
+ tsk.launcher->SignalJobError(0);
}
}
int res = launcher->WaitForJobs();
@@ -361,7 +361,7 @@ class ThreadPool {
// Initialize the spin count (from envvar TVM_THREAD_POOL_SPIN_COUNT) on
// the global first use of the ThreadPool.
// TODO(tulloch): should we make this configurable via standard APIs?
- static size_t spin_count = GetSpinCount();
+ static const uint32_t spin_count = GetSpinCount();
while (queue->Pop(&task, spin_count)) {
TVM_FFI_ICHECK(task.launcher != nullptr);
TVMParallelGroupEnv* penv = &(task.launcher->env);
@@ -471,7 +471,7 @@ void ResetThreadPool() {
tvm::runtime::ThreadPool::ThreadLocal()->Reset(); }
*/
TVM_RUNTIME_DLL void
Configure(tvm::runtime::threading::ThreadGroup::AffinityMode mode,
int nthreads, std::vector<unsigned int> cpus) {
- tvm::runtime::threading::SetMaxConcurrency(cpus.size());
+ tvm::runtime::threading::SetMaxConcurrency(static_cast<int>(cpus.size()));
#if !TVM_THREADPOOL_USE_OPENMP
tvm::runtime::ThreadPool::ThreadLocal()->UpdateWorkerConfiguration(mode,
nthreads, cpus);
#else
diff --git a/src/runtime/threading_backend.cc b/src/runtime/threading_backend.cc
index 55ac5dd00..eb6321a21 100644
--- a/src/runtime/threading_backend.cc
+++ b/src/runtime/threading_backend.cc
@@ -109,7 +109,7 @@ class ThreadGroup::Impl {
break;
case kSpecifyOneCorePerThread:
case kSpecifyThreadShareAllCore:
- num_workers_used = cpus.size();
+ num_workers_used = static_cast<int>(cpus.size());
sorted_order_ = cpus;
break;
default:
diff --git a/src/script/ir_builder/ir.cc b/src/script/ir_builder/ir.cc
index b6a76f06c..e3c50d320 100644
--- a/src/script/ir_builder/ir.cc
+++ b/src/script/ir_builder/ir.cc
@@ -264,7 +264,7 @@ ForFrame Grid(ffi::Array<ffi::Variant<PrimExpr,
ffi::Tuple<PrimExpr, PrimExpr>>>
TVM_FFI_ICHECK_EQ(vars.size(), doms.size());
TVM_FFI_ICHECK_EQ(vars.size(), steps.size());
Stmt result = std::move(body);
- int n = vars.size();
+ int n = static_cast<int>(vars.size());
for (int i = n - 1; i >= 0; --i) {
Range dom = doms[i];
Var var = vars[i];
diff --git a/src/script/printer/doc_printer.cc
b/src/script/printer/doc_printer.cc
index 7f0c19eeb..cf26e02f8 100644
--- a/src/script/printer/doc_printer.cc
+++ b/src/script/printer/doc_printer.cc
@@ -345,14 +345,14 @@ std::vector<ByteSpan> MergeAndExemptSpans(const
std::vector<ByteSpan>& spans,
// at most spans.size() spans accumulated in prefix sum
// use spans.size() + 1 as stamp unit to exempt all positive spans
// with only one negative span
- int max_n = spans.size() + 1;
+ int max_n = static_cast<int>(spans.size() + 1);
for (ByteSpan span : spans_exempted) {
prefix_stamp.push_back({span.first, -max_n});
prefix_stamp.push_back({span.second, max_n});
}
std::sort(prefix_stamp.begin(), prefix_stamp.end());
int prefix_sum = 0;
- int n = prefix_stamp.size();
+ int n = static_cast<int>(prefix_stamp.size());
for (int i = 0; i < n - 1; ++i) {
prefix_sum += prefix_stamp[i].second;
// positive prefix sum leads to spans without exemption
@@ -676,7 +676,7 @@ void DocPrinter::MarkSpan(const ByteSpan& span, const
AccessPath& path) {
pending_string_spans_->emplace_back(span, path);
return;
}
- int n = path_to_underline_.size();
+ int n = static_cast<int>(path_to_underline_.size());
for (int i = 0; i < n; ++i) {
AccessPath p = path_to_underline_[i];
if (path->depth >= current_max_path_depth_[i] && path->IsPrefixOf(p)) {
diff --git a/src/sym/int_set.cc b/src/sym/int_set.cc
index 5a6afe72f..7d5a659f0 100644
--- a/src/sym/int_set.cc
+++ b/src/sym/int_set.cc
@@ -950,14 +950,14 @@ ffi::Array<IntSet> UnionRegion(const
ffi::Array<ffi::Array<IntSet>>& nd_int_sets
if (nd_int_sets.empty()) {
return {};
}
- int n = nd_int_sets.size();
- int ndim = nd_int_sets[0].size();
+ size_t n = nd_int_sets.size();
+ size_t ndim = nd_int_sets[0].size();
ffi::Array<IntSet> result;
result.reserve(ndim);
- for (int i = 0; i < ndim; ++i) {
+ for (size_t i = 0; i < ndim; ++i) {
ffi::Array<IntSet> candidates;
candidates.reserve(n);
- for (int j = 0; j < n; ++j) {
+ for (size_t j = 0; j < n; ++j) {
candidates.push_back(nd_int_sets[j][i]);
}
result.push_back(Union(candidates));
@@ -1003,14 +1003,14 @@ ffi::Array<IntSet> UnionRegionLowerBound(const
ffi::Array<ffi::Array<IntSet>>& n
if (nd_int_sets.empty()) {
return {};
}
- int n = nd_int_sets.size();
- int ndim = nd_int_sets[0].size();
+ size_t n = nd_int_sets.size();
+ size_t ndim = nd_int_sets[0].size();
ffi::Array<IntSet> result;
result.reserve(ndim);
- for (int i = 0; i < ndim; ++i) {
+ for (size_t i = 0; i < ndim; ++i) {
ffi::Array<IntSet> candidates;
candidates.reserve(n);
- for (int j = 0; j < n; ++j) {
+ for (size_t j = 0; j < n; ++j) {
candidates.push_back(nd_int_sets[j][i]);
}
result.push_back(UnionLowerBound(candidates));
@@ -1159,7 +1159,7 @@ ffi::Optional<ffi::Array<IntSet>>
EstimateRegionStrictBound(const ffi::Array<Ran
input_iters.Set(var.as_or_throw<PrimVar>(), range);
}
AnalyzerObj* analyzer_ptr = analyzer.get();
- int ndim = region.size();
+ size_t ndim = region.size();
ffi::Array<IterSumExpr> iter_sum_exprs;
{
ffi::Array<PrimExpr> affine_indices;
@@ -1182,7 +1182,7 @@ ffi::Optional<ffi::Array<IntSet>>
EstimateRegionStrictBound(const ffi::Array<Ran
TVM_FFI_ICHECK_EQ(iter_sum_exprs.size(), ndim);
ffi::Array<IntSet> result;
result.reserve(ndim);
- for (int i = 0; i < ndim; ++i) {
+ for (size_t i = 0; i < ndim; ++i) {
const IterSumExpr& sum_expr = iter_sum_exprs[i];
const Range& range = region[i];
ffi::Optional<IntSet> int_set = EvalIterSum(sum_expr, range->extent,
analyzer_ptr);
diff --git a/src/tirx/ir/index_map.cc b/src/tirx/ir/index_map.cc
index 9b60d55ec..d10415664 100644
--- a/src/tirx/ir/index_map.cc
+++ b/src/tirx/ir/index_map.cc
@@ -123,7 +123,7 @@ ffi::Tuple<IndexMap, PrimExpr> IndexMapInverseImpl(const
IndexMap& self,
// Unpack the map to an array, maintaining the same parameter order.
ffi::Array<PrimExpr> inverse_exprs;
- for (int i = 0, n = self->initial_indices.size(); i < n; ++i) {
+ for (size_t i = 0, n = self->initial_indices.size(); i < n; ++i) {
PrimVar index = self->initial_indices[i];
PrimExpr expr{ffi::UnsafeInit{}};
if (IsOne(initial_ranges[i]->extent) && !inverse_exprs_map.count(index)) {
diff --git a/src/tirx/ir/ir_mutator_with_analyzer.cc
b/src/tirx/ir/ir_mutator_with_analyzer.cc
index e1c6a9547..84ca52075 100644
--- a/src/tirx/ir/ir_mutator_with_analyzer.cc
+++ b/src/tirx/ir/ir_mutator_with_analyzer.cc
@@ -71,12 +71,12 @@ ffi::Array<PrimExpr>
StmtExprMutatorWithAnalyzer::IterMapSimplifyWithContext(
for (PrimExpr val : iter_predicates_) {
pred = pred && val;
}
- int n = indices.size();
+ size_t n = indices.size();
sym::Analyzer analyzer_ref = ffi::GetRef<sym::Analyzer>(this->analyzer_);
ffi::Array<PrimExpr> simplified = sym::IterMapSimplify(
indices, this->iter_vars_, pred, sym::IterMapLevel::Surjective,
analyzer_ref);
if (non_trivial_only) {
- for (int i = 0; i < n; ++i) {
+ for (size_t i = 0; i < n; ++i) {
if (simplified[i]->IsInstance<IntImmObj>() && indices[i].as<PrimVar>()) {
simplified.Set(i, indices[i]);
}
diff --git a/src/tirx/ir/layout/layout.cc b/src/tirx/ir/layout/layout.cc
index 0c3fd7032..e8259a103 100644
--- a/src/tirx/ir/layout/layout.cc
+++ b/src/tirx/ir/layout/layout.cc
@@ -33,6 +33,7 @@ decltype(auto) DispatchLayout(const Layout& layout, F&& f) {
return f(compose);
}
TVM_FFI_THROW(TypeError) << "Unsupported layout type: " <<
layout->GetTypeKey();
+ TVM_FFI_UNREACHABLE();
}
} // namespace
diff --git a/src/tirx/ir/layout/utils.cc b/src/tirx/ir/layout/utils.cc
index 314549a49..2ad1d30be 100644
--- a/src/tirx/ir/layout/utils.cc
+++ b/src/tirx/ir/layout/utils.cc
@@ -24,7 +24,7 @@ namespace tirx {
Array<PrimExpr> SplitCoord(PrimExpr coord, const Array<PrimExpr>& shape) {
Array<PrimExpr> result;
- for (int i = shape.size() - 1; i >= 0; --i) {
+ for (int i = static_cast<int>(shape.size() - 1); i >= 0; --i) {
if (i == 0) {
result.push_back(coord);
} else {
diff --git a/src/tirx/transform/lower_thread_allreduce.cc
b/src/tirx/transform/lower_thread_allreduce.cc
index 358a51fb1..acae932a8 100644
--- a/src/tirx/transform/lower_thread_allreduce.cc
+++ b/src/tirx/transform/lower_thread_allreduce.cc
@@ -549,7 +549,7 @@ class ThreadAllreduceBuilder final : public StmtExprMutator
{
PrimExpr mask, ffi::Optional<PrimExpr> predicate, //
std::vector<Stmt>* seq) {
static const auto local_scope = runtime::MemoryScope::Get("local");
- int n_tensors = src_values.size();
+ size_t n_tensors = src_values.size();
std::vector<TensorVar> shared_bufs;
std::vector<TensorVar> local_bufs;
@@ -563,7 +563,7 @@ class ThreadAllreduceBuilder final : public StmtExprMutator
{
std::vector<Stmt> load_values;
load_values.reserve(n_tensors);
- for (int idx = 0; idx < n_tensors; ++idx) {
+ for (size_t idx = 0; idx < n_tensors; ++idx) {
shared_bufs.push_back(
TensorVar("red_buf" + std::to_string(idx), TensorType(shape,
dtypes[idx], local_scope)));
load_values.push_back(TensorStore(shared_bufs[idx], zero_indices,
src_values[idx]));
@@ -600,7 +600,7 @@ class ThreadAllreduceBuilder final : public StmtExprMutator
{
for (int offset = start_offset; offset > 0; offset /= 2) {
// Load reduction values, no synchronization needed.
ffi::Array<PrimExpr> a, b;
- for (int i = 0; i < n_tensors; ++i) {
+ for (size_t i = 0; i < n_tensors; ++i) {
TensorVar shared_buf = shared_bufs[i];
TensorLoad val = TensorLoad(shared_buf, zero_indices);
TVM_FFI_ICHECK_EQ(val.ty(), dtypes[i]);
@@ -634,7 +634,7 @@ class ThreadAllreduceBuilder final : public StmtExprMutator
{
// Store the reduction result to itself.
std::vector<Stmt> stores;
stores.reserve(n_tensors);
- for (int i = 0; i < n_tensors; ++i) {
+ for (size_t i = 0; i < n_tensors; ++i) {
TensorVar buf = shared_bufs[i];
stores.push_back(TensorStore(buf, zero_indices, ret[i]));
}
@@ -655,7 +655,7 @@ class ThreadAllreduceBuilder final : public StmtExprMutator
{
std::vector<PrimExpr> reduce_results;
reduce_results.reserve(n_tensors);
- for (int i = 0; i < n_tensors; ++i) {
+ for (size_t i = 0; i < n_tensors; ++i) {
reduce_results.push_back(TensorLoad(shared_bufs[i], zero_indices));
}
@@ -853,7 +853,7 @@ class ThreadAllreduceBuilder final : public StmtExprMutator
{
int16_t lanes = static_cast<int16_t>(dtype.lanes());
if (dtype.MatchesCode(kDLFloat) && dtype.bits() == 16) return lanes
> 2;
if (lanes > 1) return true;
- int bytes = dtype.StorageBytes();
+ size_t bytes = dtype.StorageBytes();
return bytes < 4 || bytes > 8;
})) {
return false;
diff --git a/src/tirx/transform/split_host_device.cc
b/src/tirx/transform/split_host_device.cc
index 05cf157aa..da85655db 100644
--- a/src/tirx/transform/split_host_device.cc
+++ b/src/tirx/transform/split_host_device.cc
@@ -571,7 +571,7 @@ Stmt MakeCudaKernelLaunch(const GlobalVar& symbol,
Function* func, ffi::Array<Ex
auto bytes = analyzer->Simplify(required.value());
int index = -1;
for (size_t i = 0; i < fields.size(); ++i) {
- if (fields[i] == "dynamic_smem_bytes") index = i;
+ if (fields[i] == "dynamic_smem_bytes") index = static_cast<int>(i);
}
if (index < 0) {
TVM_FFI_CHECK(!prim::IsZero(bytes) ||
diff --git a/src/tirx/transform/tvm_ffi_binder.cc
b/src/tirx/transform/tvm_ffi_binder.cc
index 32d9e02d4..630baca53 100644
--- a/src/tirx/transform/tvm_ffi_binder.cc
+++ b/src/tirx/transform/tvm_ffi_binder.cc
@@ -670,7 +670,7 @@ void TVMFFIABIBuilder::BindCompactStrides(const TensorVar&
tensor, const Var& st
ffi::Array<PrimExpr> conds;
for (size_t i = tensor.shape().size(); i != 0; --i) {
size_t k = i - 1;
- PrimExpr svalue = cast(LoadInt64ArrayElem(strides_ptr, k), stype);
+ PrimExpr svalue = cast(LoadInt64ArrayElem(strides_ptr,
static_cast<int>(k)), stype);
conds.push_back(tensor.shape()[k] == 1 || expect_stride == svalue);
expect_stride = expect_stride * tensor.shape()[k];
}
@@ -694,7 +694,7 @@ void TVMFFIABIBuilder::BindRegularStrides(const TensorVar&
tensor, const Var& st
const ffi::reflection::AccessPath&
param_path) {
PrimExpr stride_from_shape = 1;
auto strides = MatchShapeStridePattern(tensor.ty()).value().get<1>();
- for (int k = strides.size() - 1; k >= 0; k--) {
+ for (int k = static_cast<int>(strides.size() - 1); k >= 0; k--) {
PrimType stride_type = strides[k].ty();
PrimExpr explicit_stride = cast(LoadInt64ArrayElem(strides_ptr, k),
stride_type);
ffi::reflection::AccessPath strides_k_path =
@@ -773,7 +773,7 @@ Expr TVMFFIABIBuilder::DecodeParamDLTensor(const TensorVar&
tensor, const PrimEx
}
ffi::reflection::AccessPath shape_k_path =
param_path->Attr(ffi::String("shape"))->ArrayItem(k);
PrimExpr shape = tensor.shape()[k];
- PrimExpr value = cast(LoadInt64ArrayElem(shape_ptr, k), shape.ty());
+ PrimExpr value = cast(LoadInt64ArrayElem(shape_ptr, static_cast<int>(k)),
shape.ty());
if (shape.as<VarObj>()) {
BindScalar(shape, value, shape_k_path, true);
} else {
